Semiconductor device and manufacturing method thereof
Disclosed is a semiconductor device and semiconductor fabrication method. A semiconductor device includes: a substrate having a metal gate, gate spacers on sides of the metal gate, an etch stop layer (ESL), and interlayer dielectric (ILD) material over a source/drain region; a tungsten (W) cap formed from W material deposited over the metal gate and between the gate spacers; and a via gate (VG) formed above the W cap. A semiconductor fabrication method includes: receiving a substrate having a metal gate, gate spacers on sides of the metal gate, an etch stop layer (ESL), and interlayer dielectric (ILD) material over a source/drain region; depositing tungsten (W) material over the substrate; removing unwanted W material to form a W cap; and forming a via gate (VG) on the W cap.
1 . A method comprising:
receiving a substrate having a metal gate, gate spacers on sides of the metal gate, interlayer dielectric (ILD) material over a plurality of source/drain regions, and an etch stop layer (ESL) extending above the gate spacers and disposed between the gate spacers and the ILD material;
depositing tungsten (W) material over the substrate above the metal gate, over a surface of the gate spacers, and along a sidewall of the ESL;
removing a first portion of the W material from the sidewall of the ESL and over the surface of the gate spacers via first wet etching operations using a first solution;
removing, from the sidewall of the ESL and over the surface of the gate spacers, W material remaining after removing the first portion of the W material via second wet etching operations using a second solution that is different from the first solution to form a W cap over the metal gate;
forming openings in the ILD material over the plurality of source/drain regions;
filling conductive material in the openings contacting the plurality of source/drain regions to form source/drain contacts;
forming a contact etch stop layer (CESL) over the plurality of source/drain regions and the W cap;
forming an ILD layer over the CESL;
forming contact via openings in the CESL and the ILD layer; and
forming a via gate (VG) on the W cap through a contact via opening.
2 . The method of claim 1 , wherein depositing tungsten (W) material over the substrate comprises depositing W material using physical vapor deposition operations at a pressure of about 150 to about 250 mT.
3 . The method of claim 1 , wherein removing the first portion of the W material from the sidewall of the ESL and over the surface of the gate spacers comprises removing the first portion of the W material via wet etching operations using an ammonium solution.
4 . The method of claim 3 , wherein removing the first portion of the W material comprises removing the first portion of the W material via wet etching operations using NH 4 OH at a concentration of 1:1 to approximately 1:50 at about 50° to about 70° C.
5 . The method of claim 1 , wherein removing the W material remaining after removing the first portion of the W material comprises removing W material from the sidewall of the ESL and over the surface of the gate spacers via wet etching operations using an ozone solution.
6 . The method of claim 1 , wherein removing the W material remaining after removing the first portion of the W material comprises removing the W material from the sidewall of the ESL and over the surface of the gate spacers via wet etching operations using DIO 3 with a concentration of 5 to 100 ppm at room temperature.
7 . The method of claim 1 , wherein removing the W material remaining after removing the first portion of the W material comprises removing the W material from the sidewall of the ESL and over the surface of the gate spacers via wet etching operations using a mixture comprising an ozone solution and hydrochloric acid.
8 . The method of claim 7 , wherein the mixture comprises DIO 3 with a concentration of 5 to 100 ppm at room temperature and HCl with a concentration of 1:1 to approximately 1:50 at about 25° to about 50° C.
9 . A method comprising:
receiving a substrate having a metal gate, gate spacers on sides of the metal gate, interlayer dielectric (ILD) material over a plurality of source/drain regions, and an etch stop layer (ESL) extending above the gate spacers and disposed between the gate spacers and the ILD material;
depositing tungsten (W) material over the substrate above the metal gate, over a surface of the gate spacers, and along a sidewall of the ESL;
removing a first portion of the W material from the sidewall of the ESL and over the surface of the gate spacers using an ammonium solution;
removing, from the sidewall of the ESL and over the surface of the gate spacers, W material remaining after removing the first portion of the W material via wet etching operations using an ozone solution to form a W cap; and
forming a via gate (VG) contact on the W cap through a contact etch stop layer (CESL) and an ILD layer formed over the W cap.
10 . The method of claim 9 , wherein removing the W material remaining after removing the first portion of the W material comprises removing the W material from the sidewall of the ESL and over the surface of the gate spacers via wet etching operations using a mixture comprising the ozone solution and hydrochloric acid mixed in water.
11 . The method of claim 10 , wherein the mixture comprises DIO 3 with a concentration of 5 to 100 ppm at room temperature and HCl with a concentration of 1:1 to approximately 1:50 at about 25° to about 50° C.
12 . A method comprising:
receiving a substrate having a metal gate, gate spacers on sides of the metal gate, interlayer dielectric (ILD) material over a plurality of source/drain regions, and an etch stop layer (ESL) extending above the gate spacers and disposed between the gate spacers and the ILD material;
depositing tungsten (W) material over the substrate above the metal gate, over a surface of the gate spacers, and along a sidewall of the ESL;
removing a first portion of the W material from the sidewall of the ESL and over the surface of the gate spacers via 1st wet etching operations;
removing, from the sidewall of the ESL and over the surface of the gate spacers, W material remaining after removing the first portion of the W material via 2nd wet etching operations to form a W cap over the metal gate;
forming a contact via opening in an ILD layer and a contact etch stop layer (CESL) over the W cap; and
forming a via gate (VG) on the W cap through the contact via opening.
13 . The method of claim 12 , wherein removing the first portion of the W material from the sidewall of the ESL and the surface of the gate spacers via the 1st wet etching operations comprises removing the first portion of the W material using an ammonium solution.
14 . The method of claim 13 , wherein removing the first portion of the W material from the sidewall of the ESL and the surface of the gate spacers via the 1st wet etching operations comprises removing the first portion of the W material using NH 4 OH at a concentration of 1:1 to approximately 1:50 at about 50° to about 70° C.
15 . The method of claim 12 , wherein removing the W material remaining after removing the first portion of the W material via the 2nd wet etching operations comprises removing the W material using an ozone solution.
16 . The method of claim 15 , wherein removing the W material remaining after removing the first portion of the W material via the 2nd wet etching operations comprises removing the W material using DIO 3 with a concentration of 5 to 100 ppm at room temperature.
17 . The method of claim 12 , wherein removing the W material remaining after removing the first portion of the W material via the 2nd wet etching operations comprises removing the W material using a mixture comprising an ozone solution and hydrochloric acid.
18 . The method of claim 17 , wherein removing the W material remaining after removing the first portion of the W material via the 2nd wet etching operations comprises removing the W material using a mixture comprising DIO 3 with a concentration of 5 to 100 ppm at room temperature and HCl with a concentration of 1:1 to approximately 1:50 at about 25° to about 50° C.
19 . The method of claim 12 , wherein the metal gate comprises a metal gate for a gate-all-around (GAA) device.
20 . The method of claim 12 , wherein the W cap is formed over the metal gate with a thickness in a range of about 2 nanometers to about 10 nanometers without residue above the gate spacers.