Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
In an embodiment, a method for transferring a pattern constituted by vertical spacers arranged on a template with intervals to the template, includes depositing by plasma-enhanced cyclic deposition a layer as a spacer umbrella layer substantially only on a top surface of each vertical spacer made of silicon or metal oxide, wherein substantially no layer is deposited on sidewalls of the vertical spacers and on an exposed surface of the template, followed by transferring the pattern constituted by the vertical spacers to the template by anisotropic etching using the vertical spacers with the spacer umbrella layers.
1. A method of topology-enabling selective deposition wherein a film is deposited selectively on a top surface of a substrate having a recess pattern constituted by a bottom and sidewalls in semiconductor fabrication, comprising, in sequence:
(i) supplying a precursor to a reaction space in which the substrate is placed between electrodes, said precursor containing multiple elements including silicon or metal, carbon, nitrogen, and hydrogen;
(ii) conducting purging of the reaction space, without step (i), only to the extent that a greater amount of precursor than an amount of precursor chemisorbed on the top surface of the substrate remains in a vicinity of the top surface of the substrate; and then
(iii) applying RF power between the electrodes while supplying a plasma-generating gas devoid of H and O, without step (i), to generate an ion-rich anisotropic plasma to which the substrate is exposed, thereby depositing a topologically restricted layer selectively and predominantly on the top surface of the substrate wherein substantially no layer, or a substantially thinner layer than the topologically restricted layer, is deposited on the sidewalls and the bottom of the recess pattern without becoming thinner toward the bottom of the recess pattern,
wherein the topologically restricted layer is constituted by SiCN, SiN, TiCN, TiN, ZrCN, ZrN, HfCN, HfN, TaCN, TaN, NbCN, NbN, AlCN, AlN, CoCN, CoN, CuCN, CuN, WCN, WN, RuCN, RuN, NiCN, NiN LaCN, LaN, or WFN.
2. The method according to claim 1 , wherein no reactant in addition to the plasma-generating gas is supplied to the reaction space throughout the deposition steps.
3. The method according to claim 1 , wherein a width of the recess pattern is less than 100 nm.
4. The method according to claim 1 , wherein in step (i), the precursor is supplied to the reaction space without applying RF power between the electrodes, and the method further comprises (iv) purging the reaction chamber immediately after step (iii), wherein steps (i) to (iv) are repeated only until a thickness of the topologically restricted layer reaches 1 nm to 100 nm.
5. The method according to claim 1 , wherein the carrier gas and/or dilution gas are/is Ar, He, and/or N 2 .
6. The method according to claim 1 , wherein the recess pattern is a pattern constituted by photoresist lines or vertical spacers arranged on a template with intervals, and in step (iii),
the topologically restricted layer is deposited as an umbrella layer selectively and predominantly on a top surface of each photoresist line or each vertical spacer, wherein substantially no layer, or a substantially thinner layer than the topologically restricted layer, is deposited on sidewalls of the photoresist lines or the vertical spacers nor on an exposed surface of the template, followed by transferring the pattern constituted by the photoresist lines or the vertical spacers to the template by anisotropic etching using the photoresist lines or the vertical spacers with the umbrella layers.
7. The method according to claim 6 , wherein the topologically restricted layer is deposited on the vertical spacers which are made of silicon oxide or metal oxide and are produced by spacer-defined double patterning (SDDP).
8. The method according to claim 6 , wherein the topologically restricted layer is deposited on the photoresist lines which are formed by EUV photolithography.
9. The method according to claim 6 , wherein a thickness of the umbrella layer is in a range of 1 nm to 15 nm.
10. The method according to claim 1 , wherein the recess pattern is a pattern constituted by a fin structure for a FinFET device, and in step (iii),
the topologically restricted layer is deposited as a protective layer selectively and predominantly on a top surface of each fin structure made of silicon oxide or metal oxide, wherein substantially no layer, or a substantially thinner layer than the topologically restricted layer, is deposited on sidewalls of the fin structure and on an exposed surface of the substrate.
11. The method according to claim 1 , further comprising, after step (iii), (v) exposing the topologically restricted layer obtained in step (iii) to an oxygen plasma in the reaction space to convert the topologically restricted layer which is a nitride-based or carbonitride layer to an oxide-based layer.
12. The method according to claim 11 , wherein the topologically restricted layer is deposited on an oxide-based underlying layer, wherein the topologically restricted layer is entirely converted to the oxide-based layer in step (v) so that there is substantially no detectable seam between the topologically restricted layer and the underlying layer.
13. The method according to claim 12 , wherein a thickness of the topologically restricted layer formed on the oxide-based underlying layer is reduced by the oxygen plasma treatment in step (v).
14. The method according to claim 11 , wherein step (v) is conducted after every preset number of times of repeating steps (i) through (iii).
15. The method according to claim 14 , wherein a thickness of the topologically restricted layer is more than 20 nm upon completion of step (v).
16. The method according to claim 11 , wherein step (v) is conducted after completion of steps (i) through (iii) as a post-deposition treatment.
17. The method according to claim 16 , wherein a thickness of the topologically restricted layer is in a range of 5 nm to 20 nm upon step (v).