Granted Patent B2

US 12,250,855 · App. 17/488,376 · Granted Mar 11, 2025

Inventors: Shunpei Yamazaki (Setagaya, JP); Kengo Akimoto (Atsugi, JP); Shigeki Komori (Isehara, JP); Hideki Uochi (Atsugi, JP); Rihito Wada (Atsugi, JP); Yoko Chiba (Atsugi, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

H10K59/131H01L27/1225H01L29/7869H10K59/1213H10K50/82

Abstract

Claims (16)

1. A semiconductor device comprising:

a gate electrode;

a gate insulating layer over the gate electrode;

a first oxide semiconductor layer including indium, gallium and zinc over the gate insulating layer;

a second oxide semiconductor layer comprising indium, gallium and zinc over the first oxide semiconductor layer,

a source electrode electrically connected to the first oxide semiconductor layer;

a drain electrode electrically connected to the first oxide semiconductor layer; and

a pixel electrode electrically connected to one of the source electrode and the drain electrode,

wherein, in a plan view, an entire portion of the first oxide semiconductor layer overlaps with the gate electrode,

wherein the first oxide semiconductor layer comprises an amorphous region, and

wherein the second oxide semiconductor layer comprises a nanocrystal whose grain diameter is larger than or equal to 1 nm and smaller than or equal to 10 nm.

2. The semiconductor device according to claim 1 , further comprising a channel protective layer over and in contact with the first oxide semiconductor layer,

wherein the channel protective layer contains oxygen.

3. The semiconductor device according to claim 1 ,

wherein the source electrode is in contact with a first side surface of the first oxide semiconductor layer and a first side surface of the second oxide semiconductor layer, and

wherein the drain electrode is in contact with a second side surface of the first oxide semiconductor layer and a second side surface of the second oxide semiconductor layer.

Priority Claims (1)

Continuity (3)

References Cited (400)