Patent Assignment
Reel/Frame 019047/0683
Assignment of Assignor's Interest
Recorded: 2007-03-22
Received: 2007-03-22
Pages: 6
Assignor
ADVANCED MICRO DEVICES, INC.
Executed: 2007-01-31
Assignee
SPANSION INC.
915 DEGUIGNE DRIVE, P.O. BOX 3453, MAIL STOP 250, SUNNYVALE, CA, 94088-3453, UNITED STATES
Covered Properties
(35)
A Semiconductor Device Having Triple Ldd Structure and Lower Gate Resistance Formed with a Single Implant Process
Application:
11/120,690 →
Method of Reference Cell Design for Optimized Memory Circuit Yield
Application:
10/887,782 →
Memory Device Having a P+ Gate and Thin Bottom Oxide and Method of Erasing Same
Application:
10/878,091 →
Stacked Organic Memory Devices and Methods of Operating and Fabricating
Application:
10/848,679 →
Method for Providing Short Channel Effect Control Using a Silicide Vss Line
Application:
10/835,341 →
Memory Device with an Alternating Vss Interconnection
Application:
10/823,972 →
High Voltage Transistor Scaling Tilt Ion Implant Method
Application:
10/756,573 →
Reading Flash Memory
Application:
10/721,643 →
Method for Forming a Dielectric Spacer in a Non-Volatile Memory Device
Application:
10/696,234 →
Method for Fabricating a Memory Device
Application:
10/662,011 →
High Density Floating Gate Flash Memory and Fabrication Processes Therefor
Application:
10/660,420 →
Memory Circuit for Providing Word Line Redundancy in a Memory Sector
Application:
10/635,974 →
Low Power Charge Pump
Application:
10/636,337 →
Structure and Method to Reduce Drain Induced Barrier Lowering
Application:
10/636,336 →
Method of Fabricating Semiconductor Device Having Triple Ldd Structure and Lower Gate Resistance Formed with a Single Implant Process
Application:
10/618,514 →
Flash Memory Cell Having Reduced Leakage Current
Application:
10/618,191 →
Programming of a Flash Memory Cell
Application:
10/617,971 →
Method for Fabricating a Flash Memory Device
Application:
10/616,804 →
Semicondutor Device Having Conductive Structures Formed Near a Gate Electrode
Application:
10/454,517 →
Planar Polymer Memory Device
Application:
10/452,877 →
Erasing and Programming an Organic Memory Device and Method of Fabricating
Application:
10/436,786 →
Method and System for Improving Short Channel Effect on a Floating Gate Device
Application:
10/431,322 →
Fast Bandgap Reference Circuit for Use in a Low Power Supply a/D Booster
Application:
10/379,744 →
Compensated Oscillator Circuit for Charge Pumps
Application:
10/358,498 →
Memory Device Having a P+ Gate and Thin Bottom Oxide and Method of Erasing Same
Application:
10/341,881 →
System and Method for Charge Restoration in a Non-Volatile Memory Device
Application:
10/338,333 →
Implantation for the Formation of Cux Layer in an Organic Memory Device
Application:
10/314,054 →
Stacked Organic Memory Devices and Methods of Operating and Fabricating
Application:
10/287,612 →
Memory Device Having Resistive Element Coupled to Reference Cell for Improved Reliability
Application:
10/285,909 →
Method for Reading a Non-Volatile Memory Cell
Application:
10/283,590 →
Nitrogen Oxidation to Reduce Encroachment
Application:
10/284,866 →
Method for Reducing Drain Induced Barrier Lowering in a Memory Device
Application:
10/265,001 →
High Density Floating Gate Flash Memory and Fabrication Processes Therefor
Application:
10/244,229 →
Optical Disk Having Synchronization Region Formed Between Pre-Recorded Area and Recordable Area
Application:
10/221,682 →
Non-Volatile Memory Device
Application:
10/211,317 →