Patent Assignment
Reel/Frame 019069/0094
Assignment of Assignor's Interest
Recorded: 2007-03-27
Pages: 6
Assignor
SPANSION INC.
Executed: 2007-01-31
Assignee
SPANSION LLC
915 DEGUIGNE DRIVE, P.O. BOX 3453, MAIL STOP 250, SUNNYVALE, CALIFORNIA, 94088-3453
Covered Properties
(35)
Lpcvd Oxide and Rta for Top Oxide of Ono Film to Improve Reliability for Flash Memory Devices
Patent:
6,074,917 →
Application:
09/189,227 →
Method for Fabricating a High-Density and High-Reliability Eeprom Device
Patent:
6,218,245 →
Application:
09/198,654 →
Method for Improving Electrostatic Discharge ( Esd) Robustness
Patent:
6,238,975 →
Application:
09/199,772 →
Method of Forming Ono Stacked Films and Dcs Tungsten Silicide Gate to Improve Polycide Gate Performance for Flash Memory Devices
Patent:
6,380,029 →
Application:
09/205,899 →
Low Dielectric Metal Silicide Lined Interconnection System
Patent:
6,667,552 →
Application:
09/252,186 →
Ramped or Stepped Gate Channel Erase for Flash Memory Application
Patent:
6,188,609 →
Application:
09/307,259 →
Ramped Gate Technique for Soft Programming to Tighten the Vt Distribution
Patent:
6,172,909 →
Application:
09/370,380 →
Integrated Circuit Having Optimized Gate Coupling Capacitance
Patent:
6,576,949 →
Application:
09/387,710 →
1 Transistor Cell for Eeprom Application
Patent:
6,141,255 →
Application:
09/389,161 →
Flash Memory Device and Fabrication Method Having a High Coupling Ratio
Patent:
6,323,516 →
Application:
09/390,052 →
Operational Approach for the Suppression of Bi-Directional Tunnel Oxide Stress of a Flash Cell
Patent:
6,049,479 →
Application:
09/404,080 →
Nitride Plug to Reduce Gate Edge Lifting
Patent:
6,255,165 →
Application:
09/420,220 →
Biasing Scheme to Reduce Stress on Non-Selected Cells During Read
Patent:
6,147,907 →
Application:
09/430,336 →
Solid-Source Doping for Source/Drain to Eliminate Implant Damage
Patent:
6,329,273 →
Application:
09/430,410 →
Use of Etch to Blunt Gate Corners
Patent:
6,238,978 →
Application:
09/476,584 →
Deposited Screen Oxide for Reducing Gate Edge Lifting
Patent:
6,518,072 →
Application:
09/476,906 →
Method to Provide a Reduced Constant E-Field During Erase of Eeproms for Reliability Improvement
Patent:
6,160,740 →
Application:
09/490,351 →
Background correction for charge gain and loss
Patent:
6,178,117 →
Application:
09/490,352 →
Reduction of oxide stress through the use of forward biased body voltage
Patent:
6,137,727 →
Application:
09/490,353 →
Nitridization of the pre-ddi screen oxide
Patent:
6,294,430 →
Application:
09/495,213 →
Method to reduce read gate disturb for flash eeprom application
Patent:
6,240,016 →
Application:
09/495,214 →
APDE scheme for flash memory application
Patent:
6,198,664 →
Application:
09/495,215 →
Erase scheme to tighten the threshold voltage distribution of EEPROM flash memory cells
Patent:
6,285,588 →
Application:
09/495,216 →
Integrated Circuit Having Increased Gate Coupling Capacitance
Patent:
6,682,978 →
Application:
09/504,087 →
Method for Removing Semiconductor Arc Using Arc Cmp Buffing
Patent:
6,410,443 →
Application:
09/507,810 →
Flash Memory Cells Having a Modulation Doped Heterojunction Structure
Patent:
6,207,978 →
Application:
09/516,472 →
Planarization of a polysilicon layer surface by chemical mechanical polish to improve lithography and silicide formation
Patent:
6,346,466 →
Application:
09/538,168 →
Use of Gaseous Silicon Hydrides as a Reducing Agent to Remove Re-Sputtered Silicon Oxide
Patent:
6,530,997 →
Application:
09/543,484 →
New method to fabricate a high coupling flash cell with less silicide seam problem
Patent:
6,232,635 →
Application:
09/543,991 →
Elimination of N+ Contact Implant from Flash Technologies by Replacement with Standard Double-Diffused and N+ Implants
Patent:
6,579,781 →
Application:
09/619,231 →
Feedback Method to Optimize Electric Field During Channel Erase of Flash Memory Devices
Patent:
6,452,840 →
Application:
09/693,649 →
Self-limiting multi-level programming states
Patent:
6,233,175 →
Application:
09/693,650 →
Photoresist Spacer Process Simplification to Eliminate the Standard Polysilicon or Oxide Spacer Process for Flash Memory Circuits
Patent:
6,440,789 →
Application:
09/704,026 →
Elimination of N+ implant from flash technologies by replacement with standard medium-doped-drain (Mdd) implant
Patent:
6,277,690 →
Application:
09/708,982 →
Planarization of a Polysilicon Layer Surface by Chemical Mechanical Polish to Improve Lithography and Silicide Formation
Related Assignments
(25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Nov 11, 1998
From: SUN, CHIN-YANG; CHANG, KENT KUOHUA; CHI, DAVID
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 014943/0482 →
Assignment of Assignor's Interest
Aug 11, 2004
From: CHANG, KENT KUOHUA; CHI, DAVID; SUN, CHIN-YANG
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 015000/0607 →
Assignment of Assignor's Interest
Mar 19, 2007
From: ADVANCED MICRO DEVICES, INC.
To: SPANSION INC.
Reel/Frame 019028/0656 →
Security Agreement
Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
Release of Security Interest
Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
Assignment of Assignor's Interest
Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036017/0001 →
Assignment of Assignor's Interest
Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036017/0625 →
Assignment of Assignor's Interest
Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036017/0473 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036034/0415 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036032/0154 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036033/0060 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036034/0230 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036025/0453 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036029/0370 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036030/0001 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036030/0196 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036030/0682 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036031/0001 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036031/0355 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036031/0691 →
Partial Release of Security Interest in Patents
Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
Assignment of Assignor's Interest
Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
Assignment of Assignor's Interest
Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040908/0979 →
Release of Security Interest
Dec 22, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 041178/0061 →
Release of Security Interest
Sep 28, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 044052/0280 →