IP Library Assignment 045136/0975
Patent Assignment
Reel/Frame 045136/0975

Assignment of Assignor's Interest

Recorded: 2018-01-24 Pages: 15
Assignor
IMAGINATION TECHNOLOGIES LIMITED
Executed: 2017-10-06
Assignee
HELLOSOFT LIMITED
IMAGINATION HOUSE, HOME PARK ESTATE, KINGS LANGLEY, WD4 8LZ, UNITED KINGDOM
Covered Properties (46)
Method and Apparatus for Selecting Among a Plurality of Instruction Sets to a Microprocessor
Application: 11/704,725 →
Publication: US 2007/0204134
Multi-Stage Register Renaming Using Dependency Removal
Application: 13/751,145 →
Publication: US 2014/0047218
Dynamically Resizable Circular Buffers
Patent: 9,824,003 →
Application: 13/964,257 →
Publication: US 2014/0075144
Control of Pre-Fetch Traffic
Patent: 9,658,962 →
Application: 14/153,223 →
Publication: US 2014/0325159
Fill Partitioning of a Shared Cache
Patent: 9,645,945 →
Application: 14/153,240 →
Publication: US 2014/0201452
Indirect Branch Prediction
Patent: 9,792,123 →
Application: 14/169,771 →
Publication: US 2014/0281441
Migration of Data to Register File Cache
Patent: 9,292,450 →
Application: 14/189,719 →
Publication: US 2014/0258627
Prioritizing Instructions Based on Type
Patent: 9,558,001 →
Application: 14/340,932 →
Publication: US 2015/0106595
Increasing The Efficiency of Memory Resources In a Processor
Application: 14/456,873 →
Publication: US 2015/0058574
Soft-Partitioning of a Register File Cache
Application: 14/548,041 →
Publication: US 2015/0154022
Processor with Virtualized Instruction Set Architecture & Methods
Patent: 9,870,225 →
Application: 14/572,186 →
Publication: US 2015/0178076
Hardware Virtualized Input Output Memory Management Unit
Application: 14/589,693 →
Stack Saved Variable Pointer Value Prediction
Patent: 9,934,039 →
Application: 14/598,415 →
Publication: US 2015/0205612
Processors with Support for Compact Branch Instructions & Methods
Application: 14/612,069 →
Publication: US 2015/0227371
Processor with Granular Add Immediates Capability & Methods
Application: 14/612,077 →
Publication: US 2015/0227366
Modeless Instruction Execution with 64/32-Bit Addressing
Application: 14/612,090 →
Publication: US 2015/0242212
Processor Supporting Arithmetic Instructions with Branch on Overflow & Methods
Application: 14/612,104 →
Publication: US 2015/0227365
Translation Lookaside Buffer
Patent: 9,830,275 →
Application: 14/715,117 →
Publication: US 2016/0342523
Decoding Instructions That Are Modified By One Or More Other Instructions
Patent: 9,898,293 →
Application: 14/722,292 →
Publication: US 2015/0347144
Fault Tolerant Processor for Real-Time Systems
Application: 14/741,738 →
Publication: US 2016/0321078
Processor Arranged to Operate as a Single-Threaded (Nx)-Bit Processor and as an N-Threaded X-Bit Processor in Different Modes of Operation
Application: 14/798,841 →
Publication: US 2016/0011869
Conditional Branch Prediction Using a Long History
Application: 14/809,187 →
Publication: US 2016/0026470
Processors and Methods for Cache Sparing Stores
Application: 14/829,458 →
Publication: US 2016/0055083
Cache Operation in a Multi-Threaded Processor
Application: 14/873,027 →
Publication: US 2016/0299700
Apparatus and Method of Throttling Hardware Pre-fetch
Application: 14/919,922 →
Publication: US 2016/0117250
Processors Supporting Endian Agnostic SIMD Instructions and Methods
Application: 14/930,740 →
Publication: US 2017/0123792
Method and Apparatus for Scheduling the Issue of Instructions in a Multithreaded Processor
Application: 14/930,913 →
Publication: US 2016/0055002
Fetch Ahead Branch Target Buffer
Application: 14/935,579 →
Publication: US 2017/0132009
Execution of Load Instructions in a Processor
Application: 15/001,628 →
Publication: US 2017/0206086
Exception Handling in Processor Using Branch Delay Slot Instruction Set Architecture
Application: 15/079,784 →
Publication: US 2017/0277539
Apparatus and Methods for Out of Order Item Selection and Status Updating
Application: 15/092,728 →
Publication: US 2017/0293646
Processors Supporting Atomic Writes to Multiword Memory Locations & Methods
Application: 15/092,915 →
Publication: US 2017/0293486
Read Discards in a Processor System with Write-Back Caches
Application: 15/093,404 →
Publication: US 2017/0293556
Prioritising of Instruction Fetching in Microprocessor Systems
Patent: 9,870,228 →
Application: 15/134,510 →
Publication: US 2016/0232007
Speculative Load Issue
Patent: 9,910,672 →
Application: 15/183,365 →
Publication: US 2016/0291976
Check Pointing a Shift Register
Application: 15/205,445 →
Publication: US 2017/0010819
Check Pointing a Shift Register Using a Circular Buffer
Application: 15/205,555 →
Publication: US 2017/0010820
Fetch Unit for Predicting Target for Subroutine Return Instructions
Application: 15/281,661 →
Publication: US 2017/0090933
Prioritizing Instructions Based on Type
Application: 15/387,394 →
Publication: US 2017/0102949
Migration of Data to Register File Cache
Patent: 9,858,194 →
Application: 15/438,000 →
Publication: US 2017/0168949
Scheduling Execution of Instructions on a Processor Having Multiple Hardware Threads with Different Execution Resources
Application: 15/467,073 →
Publication: US 2017/0192779
Control of Pre-Fetch Traffic
Application: 15/488,649 →
Publication: US 2017/0220471
Stack Pointer Value Prediction
Application: 15/489,975 →
Publication: US 2017/0220353
Fetching Instructions in an Instruction Fetch Unit
Application: 15/624,121 →
Publication: US 2017/0364357
AES Hardware Implementation
Application: 15/633,988 →
Publication: US 2017/0373836
Indirect Branch Prediction
Application: 15/707,059 →
Publication: US 2018/0004529
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 28, 2013
From: JACKSON, HUGH, MR.
To: IMAGINATION TECHNOLOGIES, LTD
Reel/Frame 029700/0018 →
Assignment of Assignor's Interest Aug 12, 2013
From: SANDERS, DANIEL, MR.; JACKSON, HUGH, MR
To: IMAGINATION TECHNOLOGIES, LTD.
Reel/Frame 030987/0631 →
Assignment of Assignor's Interest Jan 13, 2014
From: MEREDITH, JASON
To: IMAGINATION TECHNOLOGIES, LTD.
Reel/Frame 031949/0857 →
Assignment of Assignor's Interest Jan 13, 2014
From: MEREDITH, JASON
To: IMAGINATION TECHNOLOGIES, LTD.
Reel/Frame 031949/0777 →
Assignment of Assignor's Interest Jan 31, 2014
From: MANOUKIAN, MANOUK
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 032107/0243 →
Assignment of Assignor's Interest Apr 28, 2014
From: JACKSON, HUGH; KHOT, ANAND
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 032766/0498 →
Assignment of Assignor's Interest Aug 11, 2014
From: MEREDITH, JASON; ISHERWOOD, ROBERT GRAHAM; JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 033509/0762 →
Assignment of Assignor's Interest Nov 5, 2014
From: KHOT, ANAND; JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034105/0795 →
Assignment of Assignor's Interest Nov 19, 2014
From: KHOT, ANAND
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034213/0118 →
Assignment of Assignor's Interest Nov 20, 2014
From: JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034215/0726 →
Assignment of Assignor's Interest Dec 22, 2014
From: SUDHAKAR, RANGANATHAN
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034567/0171 →
Assignment of Assignor's Interest Jan 5, 2015
From: PATEL, SANJAY; ROZARIO, RANJIT J
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034636/0403 →
Assignment of Assignor's Interest Jan 16, 2015
From: JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034734/0904 →
Assignment of Assignor's Interest Feb 13, 2015
From: SUDHAKAR, RANGANATHAN
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034955/0211 →
Assignment of Assignor's Interest Feb 13, 2015
From: SUDHAKAR, RANGANATHAN
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034955/0214 →
Assignment of Assignor's Interest Feb 13, 2015
From: SUDHAKAR, RANGANATHAN; ROZARIO, RANJIT J.
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034955/0223 →
Assignment of Assignor's Interest Feb 13, 2015
From: SUDHAKAR, RANGANATHAN
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034955/0226 →
Assignment of Assignor's Interest May 18, 2015
From: ROZARIO, RANJIT J.; PATEL, SANJAY
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 035662/0455 →
Assignment of Assignor's Interest Aug 24, 2015
From: WHITTAKER, JAMES ROBERT
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 036401/0744 →
Change of Name Jan 26, 2018
From: HELLOSOFT LIMITED
To: MIPS TECH LIMITED
Reel/Frame 045168/0922 →
Assignment of Assignor's Interest Apr 16, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 045554/0958 →
Assignment of Assignor's Interest Apr 17, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 045565/0677 →
Assignment of Assignor's Interest Apr 19, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 045593/0662 →
Assignment of Assignor's Interest Apr 19, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 045593/0166 →
Security Interest Feb 26, 2021
From: WAVE COMPUTING, INC.; MIPS TECH, LLC; MIPS TECH, INC.; HELLOSOFT, INC.
To: WAVE COMPUTING LIQUIDATING TRUST
Reel/Frame 055429/0532 →