IP Library Assignment 045593/0662
Patent Assignment
Reel/Frame 045593/0662

Assignment of Assignor's Interest

Recorded: 2018-04-19 Pages: 6
Assignor
MIPS TECH LIMITED
Executed: 2018-02-16
Assignee
MIPS TECH, LLC
3201 SCOTT BLVD., SANTA CLARA, CALIFORNIA, 95054
Covered Properties (32)
Scheduling Execution of Instructions on a Processor Having Multiple Hardware Threads with Different Execution Resources
Patent: 9,612,844 →
Application: 13/138,176 →
Publication: US 2012/0124338
Control of Pre-Fetch Traffic
Patent: 9,658,962 →
Application: 14/153,223 →
Publication: US 2014/0325159
Increasing The Efficiency of Memory Resources In a Processor
Application: 14/456,873 →
Publication: US 2015/0058574
Soft-Partitioning of a Register File Cache
Application: 14/548,041 →
Publication: US 2015/0154022
Processor with Virtualized Instruction Set Architecture & Methods
Patent: 9,870,225 →
Application: 14/572,186 →
Publication: US 2015/0178076
Hardware Virtualized Input Output Memory Management Unit
Application: 14/589,693 →
Stack Pointer Value Prediction
Patent: 9,652,240 →
Application: 14/596,407 →
Publication: US 2015/0205611
Stack Saved Variable Pointer Value Prediction
Patent: 9,934,039 →
Application: 14/598,415 →
Publication: US 2015/0205612
Return Stack Buffer Having Multiple Address Slots Per Stack Entry
Patent: 9,361,242 →
Application: 14/608,630 →
Publication: US 2015/0220450
Storing Look-Up Table Indexes in a Return Stack Buffer
Patent: 9,424,203 →
Application: 14/608,745 →
Publication: US 2015/0220451
Processors with Support for Compact Branch Instructions & Methods
Application: 14/612,069 →
Publication: US 2015/0227371
Processor with Granular Add Immediates Capability & Methods
Application: 14/612,077 →
Publication: US 2015/0227366
Processor Supporting Arithmetic Instructions with Branch on Overflow & Methods
Application: 14/612,104 →
Publication: US 2015/0227365
Translation Lookaside Buffer
Patent: 9,830,275 →
Application: 14/715,117 →
Publication: US 2016/0342523
Decoding Instructions That Are Modified By One Or More Other Instructions
Patent: 9,898,293 →
Application: 14/722,292 →
Publication: US 2015/0347144
Fault Tolerant Processor for Real-Time Systems
Application: 14/741,738 →
Publication: US 2016/0321078
Processor Arranged to Operate as a Single-Threaded (Nx)-Bit Processor and as an N-Threaded X-Bit Processor in Different Modes of Operation
Application: 14/798,841 →
Publication: US 2016/0011869
Processors and Methods for Cache Sparing Stores
Application: 14/829,458 →
Publication: US 2016/0055083
Cache Operation in a Multi-Threaded Processor
Application: 14/873,027 →
Publication: US 2016/0299700
Processors Supporting Endian Agnostic SIMD Instructions and Methods
Application: 14/930,740 →
Publication: US 2017/0123792
Fetch Ahead Branch Target Buffer
Application: 14/935,579 →
Publication: US 2017/0132009
Execution of Load Instructions in a Processor
Application: 15/001,628 →
Publication: US 2017/0206086
Exception Handling in Processor Using Branch Delay Slot Instruction Set Architecture
Application: 15/079,784 →
Publication: US 2017/0277539
Apparatus and Methods for Out of Order Item Selection and Status Updating
Application: 15/092,728 →
Publication: US 2017/0293646
Processors Supporting Atomic Writes to Multiword Memory Locations & Methods
Application: 15/092,915 →
Publication: US 2017/0293486
Read Discards in a Processor System with Write-Back Caches
Application: 15/093,404 →
Publication: US 2017/0293556
Check Pointing a Shift Register
Application: 15/205,445 →
Publication: US 2017/0010819
Check Pointing a Shift Register Using a Circular Buffer
Application: 15/205,555 →
Publication: US 2017/0010820
Fetch Unit for Predicting Target for Subroutine Return Instructions
Application: 15/281,661 →
Publication: US 2017/0090933
Scheduling Execution of Instructions on a Processor Having Multiple Hardware Threads with Different Execution Resources
Application: 15/467,073 →
Publication: US 2017/0192779
Control of Pre-Fetch Traffic
Application: 15/488,649 →
Publication: US 2017/0220471
Stack Pointer Value Prediction
Application: 15/489,975 →
Publication: US 2017/0220353
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 13, 2014
From: MEREDITH, JASON
To: IMAGINATION TECHNOLOGIES, LTD.
Reel/Frame 031949/0777 →
Assignment of Assignor's Interest Aug 11, 2014
From: MEREDITH, JASON; ISHERWOOD, ROBERT GRAHAM; JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 033509/0762 →
Assignment of Assignor's Interest Nov 19, 2014
From: KHOT, ANAND
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034213/0118 →
Assignment of Assignor's Interest Nov 20, 2014
From: JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034215/0726 →
Assignment of Assignor's Interest Dec 22, 2014
From: SUDHAKAR, RANGANATHAN
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034567/0171 →
Assignment of Assignor's Interest Jan 5, 2015
From: PATEL, SANJAY; ROZARIO, RANJIT J
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034636/0403 →
Assignment of Assignor's Interest Jan 14, 2015
From: JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034705/0883 →
Assignment of Assignor's Interest Jan 16, 2015
From: JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034734/0904 →
Assignment of Assignor's Interest Jan 30, 2015
From: MANOUKIAN, MANOUK VARTAN; JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034850/0714 →
Assignment of Assignor's Interest Jan 30, 2015
From: MANOUKIAN, MANOUK VARTAN; JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 034850/0890 →
Assignment of Assignor's Interest Feb 13, 2015
From: SUDHAKAR, RANGANATHAN
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034955/0211 →
Assignment of Assignor's Interest Feb 13, 2015
From: SUDHAKAR, RANGANATHAN
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034955/0226 →
Assignment of Assignor's Interest Feb 13, 2015
From: SUDHAKAR, RANGANATHAN
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 034955/0214 →
Assignment of Assignor's Interest May 18, 2015
From: ROZARIO, RANJIT J.; PATEL, SANJAY
To: IMAGINATION TECHNOLOGIES, LIMITED
Reel/Frame 035662/0455 →
Assignment of Assignor's Interest Jun 18, 2015
From: BAILEY, JULIAN
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 035859/0686 →
Assignment of Assignor's Interest Jul 14, 2015
From: JACKSON, HUGH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 036080/0160 →
Assignment of Assignor's Interest Aug 18, 2015
From: ROZARIO, RANJIT J.; NANGIA, ERA; SUDHAKAR, RANGANATHAN; CHANDRA, DEBASISH
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 036352/0695 →
Assignment of Assignor's Interest Aug 24, 2015
From: WHITTAKER, JAMES ROBERT
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 036401/0744 →
Assignment of Assignor's Interest Oct 1, 2015
From: DAY, PHILIP
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 036708/0344 →
Assignment of Assignor's Interest Jan 24, 2018
From: IMAGINATION TECHNOLOGIES LIMITED
To: HELLOSOFT LIMITED
Reel/Frame 045136/0975 →
Assignment of Assignor's Interest Jan 24, 2018
From: IMAGINATION TECHNOLOGIES LIMITED
To: HELLOSOFT LIMITED
Reel/Frame 044712/0386 →
Change of Name Jan 26, 2018
From: HELLOSOFT LIMITED
To: MIPS TECH LIMITED
Reel/Frame 045168/0922 →
Security Interest Feb 26, 2021
From: WAVE COMPUTING, INC.; MIPS TECH, LLC; MIPS TECH, INC.; HELLOSOFT, INC.
To: WAVE COMPUTING LIQUIDATING TRUST
Reel/Frame 055429/0532 →
Security Interest Jun 14, 2021
From: MIPS TECH, LLC; WAVE COMPUTING, INC.
To: CAPITAL FINANCE ADMINISTRATION, LLC
Reel/Frame 056558/0903 →
Release of Security Interest Jun 14, 2021
From: WAVE COMPUTING LIQUIDATING TRUST
To: MIPS TECH, INC.; HELLOSOFT, INC.; WAVE COMPUTING (UK) LIMITED; IMAGINATION TECHNOLOGIES, INC.
Reel/Frame 056589/0606 →