IP Library Granted Patent US 7,119,611
Granted Patent B2
US 7,119,611 · App. 10/411,993 · Granted Oct 10, 2006

On-chip calibrated source termination for voltage mode driver and method of calibration thereof

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Quick Facts
Patent No.
US 7,119,611
App. No.
10/411,993
Granted
Oct 10, 2006
Kind
B2
Abstract

On-chip calibrated source termination for voltage mode driver. An amplifier is disclosed having an internal amplifier with a first output and a second output, the first output interfaced to a non-inverting input through an interface. The second output is coupled to the first output through a series resistance element. The output impedance of the amplifier is determined by the ratio of the current drive of the first and second outputs. The voltage on said second output being a function of said interface and the current input to said internal amplifier.

Claims (169)

1. An integrated circuit amplifier, comprising:

an internal amplifier having a first output coupled to a non-inverting input through an interface;

said internal amplifier having a second output for providing an output signal of the integrated circuit with an associated output impedance;

a series resistance element coupled between said first and second outputs;

said internal amplifier including a first stage of amplification to provide current drive at said first output and through said interface, and a second stage of amplification to provide current drive at said second output through said series resistance element and said interface;

said second stage of amplification comprising a transresistance device for driving said second output;

said output impedance being a function of a ratio of a current drive of the first and second outputs and the value of said series resistance element;

a voltage on said second output being a function of said interface and a current input to said internal amplifier; and

wherein said transresistance device is comprised of a plurality of parallel transistors, each being selectable to allow for any combination of said parallel transistors to be combined to form said transresistance device, said configuration of said parallel transistors determined by an external calibration signal.

2. The amplifier of claim 1 , wherein said internal amplifier is formed on a semiconductor substrate.

3. The amplifier of claim 2 , wherein said series resistance element is formed on said semiconductor substrate.

4. The amplifier of claim 1 , wherein said first stage of amplification comprises a first transistor having a first gain for driving said first output, a pre-amplifier for driving said first transistor, said pre-amplifier having a non-inverting input associated with the non-inverting input of said internal amplifier, said transresistance device driven by said pre-amplifier.

5. The amplifier of claim 1 , wherein said second stage of amplification comprises a replica stage of amplification which drives said second output, which said replica stage of amplification provides a replica of the current through said first stage of amplification.

6. The amplifier of claim 5 , wherein said first and second stages are comprised of transresistance devices.

7. The amplifier of claim 5 , wherein said replica stage of amplification is variable, such that the ratio of said replica stage of amplification and said first stage of amplification is variable and determined by a control signal, which control signal thereby determines said output impedance.

8. The amplifier of claim 7 , wherein said control signal comprises a calibration signal, and further comprising a calibration device for determining the value of said control signal as a calibration signal.

9. The amplifier of claim 8 , wherein said calibration device and said internal amplifier are disposed on a semiconductor substrate and said series resistance element is also disposed on said semiconductor substrate.

10. The amplifier of claim 9 , wherein said calibration device is operable to determine the value of said calibration signal to account for process variations in said series resistance element.

11. The amplifier of claim 10 , wherein said calibration device includes:

a process independent reference device;

a process dependent reference device;

a comparator for comparing the operation of said process independent reference device relative to the operation of said process dependent reference device;

a correlation device for correlating the comparative operation of said process independent reference device and said process dependent reference device to the ratio of the drive currents provided at said first and second outputs, said correlation device determining the value of said calibration signal that will provide a desired output impedance.

12. The amplifier of claim 11 , wherein said process independent reference device comprises a process independent current source and said process dependent reference device comprises a process dependent current source and said comparator is operable to compare the current difference between said process independent current source and said process dependent current source to a desired reference value and said correlation device is operable to correlate the determined difference to a calibration value necessary to account for process variations in said series resistance element by adjusting said replica stage of amplification to vary the ratio of the current drive of said first and second outputs.

13. The amplifier of claim 12 , wherein said process dependent current source comprises a process independent voltage source for driving a process dependent resistive element that is dependent upon the process for fabricating said series resistance element and which is disposed upon said substrate, and a current minor for mirroring the current through said process dependent resistive element as the output of said process dependent current source.

14. The amplifier of claim 12 , wherein said process independent current source comprises a process independent voltage source for driving a process independent resistive element that is independent of the process for fabricating said series resistance element and which is disposed external to said substrate, and a current minor for mirroring the current through said process independent resistive element as the output of said process independent current source.

15. The amplifier of claim 1 , wherein the voltage at said first output is substantially independent of the ratio of the current drive of the first and second outputs.

16. The amplifier of claim 1 , wherein said interface comprises a feedback resistor.

17. The amplifier of claim 16 , wherein said feedback resistor is substantially larger than said series resistance element.

18. An integrated circuit amplifier, comprising:

an internal amplifier having a first output coupled to a non-inverting input through an interface;

said internal amplifier having a second output for providing an output signal of the integrated circuit with an associated output impedance;

a series resistance element coupled between said first and second outputs;

said output impedance a function of a ratio of a current drive of the first and second outputs and the value of said series resistance element;

a voltage on said second output being a function of said interface and the current input to said internal amplifier; and

further comprising a calibration device for calibrating the output impedance through calibration of the ratio of the current drive of the first and second outputs, wherein variation of the ratio of the current drive of the first and second outputs does not vary the voltage on said first output.

19. The amplifier of claim 18 , wherein said calibration device and said internal amplifier are disposed on a semiconductor substrate and said series resistance element is also disposed on said semiconductor substrate.

20. The amplifier of claim 19 , wherein said calibration device is operable to account for process variations in said series resistance element.

21. The amplifier of claim 20 , wherein said calibration device includes:

a process independent reference device;

a process dependent reference device;

a comparator for comparing the operation of said process independent reference device relative to the operation of said process dependent reference device;

a correlation device for correlating the comparative operation of said process independent reference device and said process dependent reference device to the ratio of the drive currents is provided at said first and second outputs, said correlation device determining the value of said calibration device that will provide a desired output impedance.

22. The amplifier of claim 21 , wherein said process independent reference device comprises a process independent current source and said process dependent reference device comprises a process dependent current source and said comparator is operable to compare the current difference between said process independent current source and said process dependent current source to a desired reference value and said correlation device is operable to correlate the determined difference to a calibration value necessary to account for process variations in said series resistance element by adjusting the ratio of the current drive of said first and second outputs.

23. The amplifier of claim 22 , wherein said process dependent reference source comprises a process independent voltage source for driving a process dependent resistive element that is dependent upon the process for fabricating said series resistance element and which is disposed upon said substrate, and a current mirror for mirroring the current through said process dependent resistive element as the output of said process dependent current source.

24. The amplifier of claim 22 , wherein said process independent reference source comprises a process independent voltage source for driving a process independent resistive element that is independent of the process for fabricating said series resistance element and which is disposed external to said substrate, and a current mirror for mirroring the current through said process independent resistive element as the output of said process independent current source.

25. A line driver for driving a transmission line having a line impedance associated therewith, comprising:

an internal amplifier having an output, and a non-inverting current input;

a first stage of amplification for driving a first output, said first output coupled to said non-inverting current input through an interface, said first stage of amplification driven by said internal amplifier;

a second stage of amplification for driving a second output to provide an output signal to the transmission line with an associated output impedance, said second stage of amplification a replica stage of said first stage of amplification and driven by said internal amplifier;

a series resistance element coupled between said first and second outputs;

said output impedance a function of the ratio of the current drive of the first and second stages of amplification to said non-inverting input and the value of said series resistance element; and

a calibration engine for determining the value of said ratio required to change the value of said output impedance to substantially equal the line impedance and varying the parameters of at least one of said first and second stages of amplification to change said ratio to the determined ratio.

26. The line driver of claim 25 , wherein the voltage on said second output is a function of said interface and the current input to said internal amplifier.

27. The line driver of claim 25 , wherein said internal amplifier is formed on a semiconductor substrate.

28. The line driver of claim 27 , wherein said series resistance element is formed on said semiconductor substrate.

29. The line driver of claim 25 , wherein said first stage of amplification comprises a first transistor having a first gain for driving said first output, said internal amplifier driving said first transistor, said second stage of amplification comprising a transresistance device for driving said second output, said transresistance device driven by said internal amplifier.

30. The line driver of claim 29 , wherein said transresistance device is comprised of a plurality of parallel transistors, each being selectable to allow for any combination of said parallel transistors to be combined to form said second transistor, said configuration of said parallel transistors determined by said calibration engine.

31. The line driver of claim 25 , wherein said first and second stages of amplification are comprised of transresistance devices.

32. The line driver of claim 25 , wherein said calibration engine and said internal amplifier are disposed on a semiconductor substrate and said series resistance element is also disposed on said semiconductor substrate.

33. The line driver of claim 32 , wherein said calibration engine is operable to determine said ratio to account for process variations in said series resistance element that will cause said output impedance to vary from a value substantially equal to the line impedance.

34. The line driver of claim 33 , wherein said calibration engine includes:

a process independent reference device;

a process dependent reference device;

a comparator for comparing the operation of said process independent reference device relative to the operation of said process dependent reference device;

a correlation device for correlating the comparative operation of said process independent reference device and said process dependent reference device to the ratio of the drive currents is provided at said first and second outputs, said correlation device determining the value of said ratio that will provide a desired output impedance to substantially equal the line impedance.

35. The line driver of claim 34 , wherein said process independent reference device comprises a process independent current source and said process dependent reference device comprises a process dependent current source and said comparator is operable to compare the current difference between said process independent current source and said process dependent current source to a desired reference value and said correlation device is operable to correlate the determined difference to a calibration value necessary to account for process variations in said series resistance element by adjusting said second stage of amplification to vary the ratio of the current feedback of said first and second outputs.

36. The line driver of claim 35 , wherein said process dependent current source comprises a process independent voltage source for driving a process dependent resistive element that is dependent upon the process for fabricating said series resistance element and which is disposed upon said substrate, and a current mirror for mirroring the current through said process dependent resistive element as the output of said process dependent current source.

37. The line driver of claim 35 , wherein said process independent current source comprises a process independent voltage source for driving a process independent resistive element that is independent of the process for fabricating said series resistance element and which is disposed external to said substrate, and a current minor for mirroring the current through said process independent resistive element as the output of said process independent current source.

38. A method for amplifying an input signal in an integrated circuit, comprising:

coupling a first output of an internal amplifier to a non-inverting input thereof through an interface;

coupling a second output of the internal amplifier through a series resistance element to the first output to provide an output signal of the integrated circuit with an associated output impedance;

the output impedance being a function of a ratio of a current drive of the first and second outputs and the value of the series resistance element;

a voltage on the second output being a function of the interface and a current input to the internal amplifier;

wherein coupling the first output comprises driving a first node with a first stage of amplification to provide current drive at the first node and coupling the first node through the interface to the non-inverting input, and coupling the second output comprises driving a second node with a second stage of amplification, the second node connected to the first node through the series resistance element to provide current drive at the second node through the series resistance element and the interface;

with driving the second node with the second stage of amplification comprising driving the second node with a transresistance device; and

wherein driving the second node with the transresistance device is comprises driving the second node with a plurality of parallel transistors, each being selectable to allow for any combination of the parallel transistors to be combined to form the transresistance device, the configuration of the parallel transistors determined by an external calibration signal.

39. The method of claim 38 , wherein driving the first node with a first stage of amplification comprises driving the first node with a first transistor having a first gain, which first transistor is driven by a pre-amplifier, the pre-amplifier having a non-inverting input associated with the non-inverting input of the internal amplifier.

40. The method of claim 38 , wherein the voltage at the first output is substantially independent of the ratio of the current drive of the first and second outputs.

41. The method of claim 38 , wherein the interface comprises a feedback resistor.

42. The method of claim 41 , wherein the feedback resistor is substantially larger than the series resistance element.

43. A method for amplifying an input signal in an integrated circuit, comprising:

coupling a first output of an internal amplifier to a non-inverting input thereof through an interface;

coupling a second output of the internal amplifier through a series resistance element to the first output to provide an output signal from the integrated circuit with an associated output impedance;

the output impedance a function of a ratio of a current drive of the first and second outputs and the value of the series resistance element;

a voltage on the second output being a function of the interface and the current input to the internal amplifier wherein coupling the first output comprises driving a first node with a first stage of amplification to provide current drive at the first node and coupling the first node through the interface to the non-inverting input, and coupling the second output comprises driving a second node with a second stage of amplification, the second node connected to the first node through the series resistance element to provide current drive at the second node through the series resistance element and the interface; wherein driving the second node with the second stage of amplification comprises driving the second node with a replica stage of amplification, which replica stage of amplification provides a replica of the current through the first stage of amplification.

44. The method of claim 43 , wherein the first and second stages of amplification are comprised of transresistance devices.

45. The method of claim 43 , wherein the replica stage of amplification is variable, and further comprising varying the ratio of the replica stage of amplification and the first stage of amplification by generating a control signal that determines the ratio, which control signal thereby determines the output impedance.

46. The method of claim 45 , wherein the control signal comprises a calibration signal, and further comprising determining the value of the control signal as a calibration signal with a calibration device.

47. The method of claim 46 , wherein the calibration device and the internal amplifier are disposed on a semiconductor substrate and the series resistance element is also disposed on the semiconductor substrate.

48. The method of claim 47 , wherein determining the value of the control signal as a calibration signal with the calibration device comprises determining the value of the calibration signal with the calibration device to account for process variations in the series resistance element.

49. The method of claim 48 , wherein determining the value of the calibration signal with the calibration device includes

generating a process independent reference parameter with a process independent reference device;

generating a process dependent reference parameter with a process dependent reference device;

comparing the operation of the process independent reference device relative to the operation of the process dependent reference device;

correlating the comparative operation of the process independent reference device and the process dependent reference device to the ratio of the drive currents provided at the first and second outputs, the step of correlating determining the value of the calibration signal that will provide a desired output impedance.

50. The method of claim 49 , wherein generating a process independent reference parameter with process independent reference device comprises generating a process independent reference parameter with a process independent current source, and generating a process dependent reference parameter with the process dependent reference device comprises generating a process dependent reference parameter with a process dependent current source and the step of comparing is operable to compare the current difference between the process independent current source and the process dependent current source to a desired reference value and the correlation device is operable to correlate the determined difference to a calibration value necessary to account for process variations in the series resistance element by adjusting the replica stage of amplification to vary the ratio of the current drive of the first and second outputs.

51. The method of claim 50 , wherein generating a process dependent reference parameter with a process dependent current source comprises:

providing a process independent voltage source:

driving a process dependent resistive element with the process dependent resistive element, which process dependent resistive element is dependent upon the process for fabricating the series resistance element and which is disposed upon the substrate; and

mirroring the current through the process dependent resistive element as the output of the process dependent current source.

52. The method of claim 50 , wherein generating a process independent reference parameter with a process independent current source comprises:

providing a process independent voltage source:

driving a process independent resistive element that is independent of the process for fabricating the series resistance element and which is disposed external to the substrate; and

mirroring the current through the process independent resistive element as the output of the process independent current source.

53. A method for amplifying an input signal in an integrated circuit, comprising:

coupling a first output of an internal amplifier to a non-inverting input thereof through an interface;

coupling a second output of the internal amplifier through a series resistance element to the first output to provide an output signal of the integrated circuit with an associated output impedance;

the output impedance a function of a ratio of a current drive of a first and second outputs and the value of the series resistance element; and

a voltage on the second output being a function of the interface and the current input to the internal amplifier and further comprising calibrating the output impedance with a calibration device through calibration of the ratio of the current drive of the first and second outputs, wherein variation of the ratio of the current drive of the first and second outputs does not vary the voltage on the first output.

54. The method of claim 53 , wherein the calibration device and the internal amplifier are disposed on a semiconductor substrate and the series resistance element is also disposed on the semiconductor substrate.

55. The method of claim 54 , wherein calibrating the output impedance with the calibration device is operable to account for process variations in the series resistance element.

56. The method of claim 55 , wherein calibrating the output impedance with the calibration device includes:

generating a process independent reference parameter with a process independent reference device;

generating a process dependent reference parameter with a process dependent reference device;

comparing the operation of the process independent reference device relative to the operation of the process dependent reference device;

correlating the comparative operation of the process independent reference device and the process dependent reference device to the ratio of the drive currents is provided at the first and second outputs, the step of correlating determining the value of the calibration device that will provide a desired output impedance.

57. The method of claim 56 , wherein the process independent reference device comprises a process independent current source and the process dependent reference device comprises a process dependent current source and the step of comparing is operable to compare the current difference between the process independent current source and the process dependent current source to a desired reference value and the step of correlating is operable to correlate the determined difference to a calibration value necessary to account for process variations in the series resistance element by adjusting the ratio of the current drive of the first and second outputs.

58. The method of claim 57 , wherein generating the process dependent reference parameter with a process dependent current source comprises:

providing a process independent voltage source;

driving a process dependent resistive element with the process independent voltage source, which process dependent resistive element is dependent upon the process for fabricating the series resistance element and which is disposed upon the substrate; and

mirroring the current through the process dependent resistive element as the output of the process dependent current source.

59. The method of claim 57 , wherein generating the process independent reference parameter with process independent reference source comprises:

providing a process independent voltage source;

driving a process independent resistive element with the process independent voltage source, which process independent resistive element that is independent of the process for fabricating the series resistance element and which is disposed external to the substrate; and

mirroring the current through the process independent resistive element as the output of the process independent current source.

60. A method for driving a transmission line having a line impedance associated therewith, comprising the steps of:

providing an internal amplifier having an output, and a non-inverting current input;

driving a first output with a first stage of amplification, the first output coupled to the non-inverting current input through an interface, the first stage of amplification driven by the internal amplifier;

driving a second output with a second stage of amplification to provide an output signal to the transmission line with an associated output impedance, the second stage of amplification a replica stage of the first stage of amplification and driven by the internal amplifier;

coupling the first and second outputs with a series resistance element disposed therebetween;

the output impedance a function of a ratio of a current drive of the first and second stages of amplification to the non-inverting input and the value of the series resistance element; and

determining with a calibration engine the value of the ratio required to change the value of the output impedance to substantially equal the line impedance and varying the parameters of at least one of the first and second stages of amplification to change the ratio to the determined ratio.

61. The method of claim 60 , wherein the voltage on the second output is a function of the interface and the current input to the internal amplifier.

62. The method of claim 60 , wherein the step of providing the internal amplifier comprises forming the internal amplifier on a semiconductor substrate.

63. The method of claim 62 , wherein the series resistance element is formed on the semiconductor substrate.

64. The method of claim 60 , wherein the step of driving the first output with a first stage of amplification comprises the step of driving the first output with a first transistor having a first gain, the internal amplifier driving the first transistor, the step of driving the second output with the second stage of amplification comprising the step of driving the second output with a transresistance device, the transresistance device driven by the internal amplifier.

65. The method of claim 64 , wherein the transresistance device is comprised of a plurality of parallel transistors, each being selectable to allow for any combination of the parallel transistors to be combined to form the second transistor, the configuration of the parallel transistors determined by the step of determining with the calibration engine.

66. The method of claim 60 , wherein the first and second stages of amplification are comprised of transresistance devices.

67. The method of claim 60 , wherein the calibration engine and the internal amplifier are disposed on a semiconductor substrate and the series resistance element is also disposed on the semiconductor substrate.

68. The method of claim 67 , wherein the step of determining with the calibration engine is operable to determine the ratio to account for process variations in the series resistance element that will cause the output impedance to vary from a value substantially equal to the line impedance.

69. The method of claim 68 , wherein the step of determining with the calibration engine includes the steps of:

generating a process independent reference parameter with a process independent reference device;

generating a process dependent reference parameter with a process dependent reference device;

comparing the operation of the process independent reference device relative to the operation of the process dependent reference device; and

correlating the comparative operation of the process independent reference device and the process dependent reference device to the ratio of the drive currents is provided at the first and second outputs, the step of correlating determining the value of the ratio that will provide a desired output impedance to substantially equal the line impedance.

70. The method of claim 69 , wherein the step of generating the process independent reference parameter with the process independent reference device comprises generating the process independent reference parameter with a process independent current source and step of generating the process dependent reference parameter with the process dependent reference device comprises generating the process dependent reference parameter with a process dependent current source and the step of comparing is operable to compare the current difference between the process independent current source and the process dependent current source to a desired reference value and the step of correlating is operable to correlate the determined difference to a calibration value necessary to account for process variations in the series resistance element by adjusting the second stage of amplification to vary the ratio of the current drive of the first and second outputs.

71. The method of claim 70 , wherein the step of generating the process dependent parameter with the process dependent current source comprises the steps of:

generating a process independent voltage source;

driving a process dependent resistive element with the process independent voltage source, which process dependent resistive element is dependent upon the process for fabricating the series resistance element and which is disposed upon the substrate; and

mirroring the current through the process dependent resistive element as the output of the process dependent current source.

72. The method of claim 70 , wherein the generating a process independent reference parameter with the process independent current source comprises the steps of:

generating a process independent voltage source:

driving a process independent resistive element with the process independent voltage source, which process independent resistive element is independent of the process for fabricating the series resistance element and which is disposed external to the substrate, and a current minor for mirroring the current through the process independent resistive element as the output of the process independent current source.

73. A calibration system for calibrating an output impedance of a line driver to match the impedance of a transmission line, which line driver has an internal amplifier with a first output at a first gain fed back to an input thereof through an interface device and a second output with a second gain that is a replica of the first gain with a series resistance element connected between the first and second outputs, and wherein the output impedance of the line driver is a function of a ratio of a current drive at the first and second outputs, comprising:

a calibration device for determining as a calibration value the ratio of the current drive at the first and second outputs that will provide an output impedance from the line driver that will substantially match the transmission line impedance; and

means for varying the ratio of the current drive at the first and second outputs in accordance with the calibration value.

74. The calibration system of claim 73 , wherein the internal amplifier includes a first stage of amplification to provide current drive at the first output and through the interface, and a second stage of amplification to provide current drive at the second output through the series resistance element and the interface, the second stage of amplification comprising a replica stage of amplification which drives the second output, which replica stage of amplification provides a replica of the current through the first stage of amplification, and said means for varying the ratio comprises means for varying the ratio of the gains of the replica stage of amplification and the first stage of amplification.

75. The calibration system of claim 74 , wherein the replica stage of amplification is variable and said means for varying the ratio comprises means for varying the replica stage of amplification.

76. The calibration system of claim 75 , wherein said calibration device and the internal amplifier are disposed on a semiconductor substrate and the series resistance element is also disposed on said semiconductor substrate.

77. The calibration system of claim 76 , wherein said calibration device is operable to determine said calibration signal to account for process variations in said series resistance element.

78. The amplifier of claim 77 , wherein said calibration device includes:

a process independent reference device;

a process dependent reference device;

a comparator for comparing the operation of said process independent reference device relative to the operation of said process dependent reference device;

a correlation device for correlating the comparative operation of said process independent reference device and said process dependent reference device to the ratio of the drive currents provided at said first and second outputs, said correlation device determining the magnitude of said calibration value that will provide a desired output impedance.

79. The amplifier of claim 78 , wherein said process independent reference device comprises a process independent current source and said process dependent reference device comprises a process dependent current source and said comparator is operable to compare the current difference between said process independent current source and said process dependent current source to a desired reference value and said correlation device is operable to correlate the determined difference to a magnitude of said calibration value necessary to account for process variations in said series resistance element by adjusting the replica stage of amplification to vary the ratio of the current drive of the first and second outputs.

80. The amplifier of claim 79 , wherein said process dependent current source comprises a process independent voltage source for driving a process dependent resistive element that is dependent upon the process for fabricating the series resistance element and which is disposed upon said substrate, and a current mirror for mirroring the current through said process dependent resistive element as the output of said process dependent current source.

81. The amplifier of claim 79 , wherein said process independent current source comprises a process independent voltage source for driving a process independent resistive element that is independent of the process for fabricating the series resistance element and which is disposed external to said substrate, and a current mirror for mirroring the current through said process independent resistive element as the output of said process independent current source.

Assignments (27)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2017
From: MICROSEMI COMMUNICATIONS, INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 042523/0577 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
MERGER AND CHANGE OF NAME Recorded May 13, 2015
From: VITESSE SEMICONDUCTOR CORPORATION; LLIU100 ACQUISITION CORP.
To: MICROSEMI COMMUNICATIONS, INC.
Reel/Frame 035651/0708 →
SUPPLEMENTAL SECURITY AGREEMENT Recorded Apr 29, 2015
From: MICROSEMI COMMUNICATIONS, INC.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 035532/0925 →
RELEASE OF SECURITY INTEREST Recorded Apr 28, 2015
From: WHITEBOX VSC, LTD.
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 035526/0090 →
RELEASE OF SECURITY INTEREST Recorded Nov 5, 2014
From: US BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 034176/0162 →
COLLATERAL ASSIGNMENT (INTELLECTUAL PROPERTY) Recorded Nov 5, 2009
From: VITESSE SEMICONDUCTOR CORPORATION
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 023471/0267 →
RELEASE OF SECURITY INTEREST Recorded Oct 29, 2009
From: OBSIDIAN, LLC
To: VITESSE SEMICONDUCTOR CORPORATION; VLTESSE INTERNATIONAL, INC.; VITESSE MANUFACTURING & DEVELOPMENT CORPORATION; VITESSE SEMICONDUCTOR SALES CORPORATION
Reel/Frame 023438/0587 →
SECURITY AGREEMENT Recorded Oct 22, 2009
From: VITESSE SEMICONDUCTOR CORPORATION
To: WHITEBOX VSC, LTD.
Reel/Frame 023401/0813 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2009
From: OBSIDIAN, LLC
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 023373/0053 →
SECURITY AGREEMENT Recorded Jun 29, 2006
From: VITESSE SEMICONDUCTOR CORPORATION
To: OBSIDIAN, LLC, AS COLLATERAL AGENT
Reel/Frame 017846/0847 →
MERGER Recorded Jan 18, 2006
From: CICADA SEMICONDUCTOR CORPORATION
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 017025/0832 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2003
From: WYERS, ERIC JAMES; STIURCA, DAN; PAULOS, JOHN JAMES
To: CICADA SEMICONDUCTOR, INC.
Reel/Frame 013967/0013 →