Granted Patent B2

US 12,402,363 · App. 18/624,488 · Granted Aug 26, 2025

Inventors: Shunpei Yamazaki (Tokyo, JP); Toshihiko Takeuchi (Kanagawa, JP); Naoto Yamade (Kanagawa, JP); Hiroshi Fujiki (Yamaguchi, JP); Tomoaki Moriwaka (Kanagawa, JP); Shunsuke Kimura (Kanagawa, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

H10D30/751H01L21/02172H10B12/30H10B12/50H10D30/6729H10D64/667

Abstract

Claims (62)

1. A semiconductor device comprising:

a substrate;

a first insulator over the substrate;

a first conductor and a second conductor over the first insulator;

a third conductor over the first conductor and the second conductor;

a second insulator over the third conductor;

an oxide over the second insulator;

a third insulator over the oxide;

a fourth conductor over the third insulator;

a fourth insulator over the fourth conductor;

a fifth conductor over the fourth insulator; and

a fifth insulator over the fifth conductor,

wherein the third conductor comprises a region configured to function as a first gate electrode of a transistor,

wherein the fourth conductor comprises a region configured to function as a second gate electrode of the transistor,

wherein the oxide comprises a first region configured to function as a channel formation region of the transistor and a second region configured to function as a first electrode of a capacitor,

wherein the fifth conductor comprises a region configured to function as a second electrode of the capacitor,

wherein the oxide overlaps with the first conductor,

wherein the oxide is electrically connected to the second conductor, and

wherein the fifth conductor overlaps with the first conductor, the second conductor, the third conductor, and the fourth conductor.

2. The semiconductor device according to claim 1 ,

wherein the oxide comprises In, Ga, and Zn.

3. The semiconductor device according to claim 1 , wherein the first conductor is configured to function as a wiring.

4. A semiconductor device comprising:

a first transistor;

a second transistor;

a third transistor; and

a first capacitor,

wherein a first channel formation region of the first transistor comprises silicon,

wherein a first insulator is provided over the first channel formation region,

wherein a first conductor is provided over the first insulator,

wherein the first conductor comprises a region configured to function as a first gate electrode of the first transistor,

wherein a second insulator is provided over the first conductor,

wherein a second conductor and a third conductor are provided over the second insulator,

wherein a third insulator is provided over the second conductor and the third conductor,

wherein an oxide is provided over the third insulator,

wherein the oxide comprises a first region configured to function as a second channel formation region of the second transistor, a second region configured to function as a third channel formation region of the third transistor, and a third region configured to function as a first electrode of the first capacitor,

wherein a fourth insulator is provided over the oxide,

wherein a fourth conductor is provided over the fourth insulator,

wherein a fifth conductor is provided over the oxide,

wherein a fifth insulator is provided over the fourth conductor and the fifth conductor,

wherein a sixth conductor is provided over the fifth insulator,

wherein the sixth conductor comprises a region configured to function as a second electrode of the first capacitor, and

wherein the first conductor is electrically connected to the first electrode of the first capacitor.

5. The semiconductor device according to claim 4 , wherein the sixth conductor overlaps with the first channel formation region of the first transistor and the second channel formation region of the second transistor.

6. A semiconductor device comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor; and

a first capacitor,

wherein a first channel formation region of the first transistor comprises silicon,

wherein a second channel formation region of the second transistor comprises silicon,

wherein a first oxide is provided over the first transistor and the second transistor,

wherein a second oxide is provided over the third transistor,

wherein the first oxide comprises a first region configured to function as a third channel formation region of the third transistor,

wherein the second oxide comprises a first region configured to function as a fourth channel formation region of the fourth transistor and a second region configured to function as a first electrode of the first capacitor,

wherein a first insulator is provided over the second oxide, and wherein a first conductor comprising a region configured to function as a second electrode of the first capacitor is provided over the first insulator.

7. The semiconductor device according to claim 6 , further comprising:

a second capacitor,

wherein the first oxide comprises a second region configured to function as a first electrode of the second capacitor,

wherein a first gate electrode of the first transistor is electrically connected to the first electrode of the first capacitor, and

wherein a second gate electrode of the second transistor is electrically connected to the first electrode of the second capacitor.

Assignments (2)

Priority Claims (2)

Continuity (4)

References Cited (171)