Semiconductor device and method
View Patent ↗Methods are disclosed for forming a multi-layer structure including highly controlled diffusion interfaces between alternating layers of different semiconductor materials. According to embodiments, during a deposition of semiconductor layers, the process is controlled to remain at low temperatures such that an inter-diffusion rate between the materials of the deposited layers is managed to provide diffusion interfaces with abrupt Si/SiGe interfaces. The highly controlled interfaces and first and second layers provide a multi-layer structure with improved etching selectivity. In an embodiment, a gate all-around (GAA) transistor is formed with horizontal nanowires (NWs) from the multi-layer structure with improved etching selectivity. In embodiments, horizontal NWs of a GAA transistor may be formed with substantially the same size diameters and silicon germanium (SiGe) NWs may be formed with “all-in-one” silicon (Si) caps.
1. A method, comprising:
depositing a first layer on a substrate, the first layer including a first semiconductor material; and
growing a second layer on the first layer, the second layer including a second semiconductor material being different from the first semiconductor material and the first and second layers forming a first stack, wherein the first stack includes a first diffusion interface between the first layer and the second layer, wherein the first diffusion interface has a thickness that is greater than zero and less than or equal to 2 nanometers, wherein the depositing the first layer or the growing the second layer comprises using a first deposition process with a first precursor material, and wherein forming another one of the depositing the first layer or the growing the second layer comprises using a second deposition process with the first precursor material and a second precursor material.
2. The method of claim 1 , wherein the growing the second layer is performed at a temperature at or below 600° C.
3. The method of claim 1 , wherein the first precursor material is a silane based compound and the second precursor material is a germane based compound.
4. The method of claim 3 , wherein the silane based compound is silicore.
5. The method of claim 4 , wherein the germane based compound is dichlorogermane.
6. The method of claim 1 , further comprising:
depositing at least a second stack of semiconductor layers over the first stack, including:
depositing another first layer of the first semiconductor material on the second layer of the first stack; and
growing another second layer of the second semiconductor material on the another first layer of the first semiconductor material, the second stack including another first diffusion interface between the another first layer and the another second layer, wherein the first stack and the second stack form a superlattice including a compound stack of alternating layers of the first semiconductor material and the second semiconductor material on a substrate; and
constructing at least one stack of horizontal nanowires from the compound stack of alternating layers of the superlattice, comprising:
patterning at least one fin from the compound stack of the superlattice; and
removing one of the first layers and the second layers from the superlattice.
7. The method claim 6 , further comprising forming a gate all-around transistor from the at least one stack of horizontal nanowires.
8. The method of claim 1 , further comprising forming a gate all-around transistor from the first layer and the second layer.
9. A method, comprising:
depositing a first layer on a substrate by a first deposition process, the first layer including a first semiconductor material;
growing a second layer on the first layer by a second deposition process, the second layer including a second semiconductor material, the second semiconductor material being different from the first semiconductor material, the first and second layers forming a first stack of alternating layers of the first and second semiconductor materials, wherein one of the first deposition process and the second deposition process comprises using a first precursor material, wherein the other one of the first deposition process and the second deposition process is performed at a temperature at or below 600° C. and comprises using the first precursor material and a second precursor material, wherein the first stack includes a first diffusion interface disposed between the first layer and the second layer, and wherein an abruptness of the first diffusion interface is greater than zero and less than or equal to 2 nanometers;
constructing at least one nanowire from the first stack of alternating layers, wherein constructing the at least one nanowire comprises:
patterning the first stack; and
removing one of the first semiconductor material and the second semiconductor material from the first stack, wherein the removing is performed such that the one of the first semiconductor material and the second semiconductor material is removed from the first stack and the other semiconductor material remains in the first stack.
10. The method of claim 9 , wherein the abruptness of the first diffusion interface is less than or equal to 1 nanometer.
11. The method of claim 10 , wherein the abruptness of the first diffusion interface is less than or equal to 0.96 nanometers.
12. The method of claim 9 , wherein the at least one nanowire includes a semiconductor core structure and a sheath layer, the semiconductor core structure including the other semiconductor material that remains in the first stack and the sheath layer including the first diffusion interface, and wherein the removing is further performed such that a residual portion of the one of the first semiconductor material and the second semiconductor material remains in the first stack with the first diffusion interface and the other semiconductor material, the residual portion being silicon and the residual portion forming with the first diffusion interface the sheath layer as a silicon cap layer of the nanowire.
13. A method, comprising:
depositing layers of a first semiconductor material and layers of a second semiconductor material on a substrate to form a stack of layers of the first and second semiconductor materials, the second semiconductor material being different from the first semiconductor material, including alternating between depositing layers of the first semiconductor material and depositing layers of the second semiconductor material such that the stack of layers is formed as a superlattice of alternating layers of the first semiconductor material and the second semiconductor material on a substrate, wherein at least one of the layers of the first semiconductor material is deposited as a compound layer of the first semiconductor material, by:
introducing a first precursor material and a second precursor material according to a first parameter profile, to deposit a first portion of the compound layer having a first concentration of a first component;
introducing the first precursor material and the second precursor material according to a second parameter profile, to deposit a second portion of the compound layer on the first portion of the compound layer, the second portion of the compound layer having a second concentration of the first component larger than the first concentration of the first component; and
introducing the first precursor material and the second precursor material according to a third parameter profile, to deposit a third portion of the compound layer on the second portion of the compound layer, the third portion of the compound layer having a third concentration of the first component smaller than the second concentration of the first component.
14. The method of claim 13 , wherein the first semiconductor material comprises silicon germanium.
15. The method of claim 13 , further comprising removing at least a portion of the second semiconductor material from between layers of the first semiconductor material to form a first nanowire.
16. The method of claim 13 , further comprising performing a deposition process for introducing the first precursor material and the second precursor material according to the first parameter profile, the first parameter profile including performing the deposition process between about 650° C. and about 680° C.
17. The method of claim 13 , further comprising performing a deposition process for introducing the first precursor material and the second precursor material according to the second parameter profile, the second parameter profile including performing the deposition process at or below 620° C.
18. The method of claim 13 , wherein the first concentration is about 15%, the second concentration is about 50%, and the third concentration is about 15%.
19. The method of claim 13 , wherein the second precursor material is a germane based compound and the first concentration of the first component is less than 20% Ge and the second concentration of the first component is greater than 20%.
20. The method of claim 13 , wherein the superlattice further comprises diffusion interfaces disposed between each of the alternating layers of the first semiconducting material and the second semiconductor material, wherein an abruptness of at least one of the diffusion interfaces is greater than zero and less than or equal to 2 nanometers.