Patent Assignment
Reel/Frame 035058/0646
Assignment of Assignor's Interest
Recorded: 2015-02-20
Pages: 110
Assignor
LUCENT TECHNOLOGIES INC.
Executed: 2001-01-30
Assignee
AGERE SYSTEMS GUARDIAN CORP.
1110 AMERICAN PARKWAY NE, ALLENTOWN, PENNSYLVANIA, 18109
Covered Properties
(65)
Microelectronic Package with Device Cooling
Patent:
5,696,405 →
Application:
08/542,995 →
Process for Forming Integrated Capacitors
Patent:
5,589,416 →
Application:
08/568,040 →
Equalizer Filter Configuration for Processing Real-Valued and Complex- Valued Signal Samples
Patent:
5,912,828 →
Application:
08/581,634 →
Update Block for an Adaptive Equalizer Filter Configuration Capable of Processing Complex-Valued Coefficient Signals
Patent:
5,805,481 →
Application:
08/581,635 →
Method for Making Bipolar Transistors Having Indium Doped Base
Patent:
5,681,763 →
Application:
08/581,665 →
Computer Bus Resource Port
Patent:
6,067,317 →
Application:
08/649,095 →
Flip-Chip Integrated Circuit with Improved Testability
Patent:
5,719,449 →
Application:
08/724,129 →
Deuterated Bipolar Transistor and Method of Manufacture Thereof
Patent:
5,982,020 →
Application:
08/848,113 →
Capacitor Comprising Improved Taox-Based Dielectric
Patent:
5,977,582 →
Application:
08/862,907 →
Integrated Circuit Fabrication
Patent:
5,945,355 →
Application:
08/871,383 →
Mos Image Sensor
Patent:
6,141,050 →
Application:
08/879,926 →
Dvb Frame Synchronization
Patent:
6,072,839 →
Application:
08/899,534 →
A Device and Method of Forming a Metal to Metal Capacitor Within an Integrated Circuit
Patent:
6,040,616 →
Application:
08/909,563 →
Metal to Metal Capacitor Apparatus and Method for Making
Patent:
5,903,493 →
Application:
08/932,005 →
Trellis Decoder for Real-Time Video Rate Decoding and De-Interleaving
Patent:
6,094,739 →
Application:
08/936,316 →
Integrated Circuit Fabrication
Patent:
6,168,904 →
Application:
08/939,422 →
Method of Creating an Interconnect in a Substrate and Semiconductor Device Employing the Same
Patent:
6,107,191 →
Application:
08/965,706 →
Bond Pad Design for Integrated Circuits
Patent:
5,986,343 →
Application:
09/072,369 →
Method for Fabricating Semiconductor Devices
Patent:
6,200,734 →
Application:
09/094,920 →
Technique for Designing an Amplifier Circuit in an Integrated Circuit Device
Patent:
6,094,098 →
Application:
09/098,971 →
Controlled Output Impedance Buffer Using Cmos Technology
Patent:
6,087,853 →
Application:
09/100,939 →
Apparatus and Method for Detecting an Ntsc Signal in an Hdtv Transmission Signal
Patent:
6,201,576 →
Application:
09/105,783 →
Process of Chemical-Mechanical Polishing and Manufacturing an Integrated Circuit
Patent:
6,080,671 →
Application:
09/136,095 →
Thin Film Transistors
Patent:
6,215,130 →
Application:
09/137,920 →
Charge-Pump Phase-Locked Loop with Dc Current Source
Patent:
6,040,742 →
Application:
09/144,913 →
Unequal Error Protection for Digital Broadcasting Using Channel Classification
Patent:
6,292,917 →
Application:
09/163,656 →
Transverse Correlator Structure for a Rake Receiver
Patent:
6,434,163 →
Application:
09/169,674 →
Tuning Scheme for Error-Corrected Broadcast Progams
Patent:
6,370,666 →
Application:
09/203,663 →
Multiple Program Unequal Error Protection for Digital Audio Broadcasting and Other Applications
Patent:
6,223,324 →
Application:
09/225,794 →
Asynchronous Low Power Mode Bus Controller Circuit and Method of Low Power Mode Operation
Patent:
6,567,921 →
Application:
09/237,269 →
Joint Multiple Program Coding for Digital Audio Broadcasting and Other Applications
Patent:
6,931,372 →
Application:
09/238,136 →
Multiple Program Decoding for Digital Audio Broadcasting and Other Applications
Patent:
6,378,101 →
Application:
09/238,137 →
Joint Multiple Program Error Concealment for Digital Audio Broadcasting and Other Applications
Patent:
6,357,029 →
Application:
09/238,138 →
Integrated Circuit Comprising Means for High Frequency Signal Transmission
Patent:
6,194,750 →
Application:
09/243,377 →
Array Readout System
Patent:
6,677,995 →
Application:
09/244,363 →
Lithographic Process Having Sub-Wavelength Resolution
Patent:
6,218,057 →
Application:
09/293,103 →
Bond Pad Design for Integrated Circuits
Patent:
6,207,547 →
Application:
09/305,766 →
Guaranteeing Data Transfer Delays in Data Packet Networks Using Earliest Deadline First Packet Schedulers
Patent:
6,532,213 →
Application:
09/312,253 →
Cascode Current Mirror with Amplifier
Patent:
6,124,705 →
Application:
09/377,851 →
Method of Fabricating a Semiconductor Mesa Device
Patent:
6,399,403 →
Application:
09/378,032 →
Deuterated Bipolar Transistor and Method of Manufacture Thereof
Patent:
6,309,938 →
Application:
09/386,592 →
Methods and Apparatus for Representation of Branch Metrics in a Communication System Decoder
Patent:
6,343,103 →
Application:
09/390,386 →
Selective Growth Process for Group Iii-Nitride-Based Semiconductors
Patent:
6,265,322 →
Application:
09/399,655 →
Automatic Clock Switching
Patent:
6,194,940 →
Application:
09/406,533 →
Off-Hook Visual Message Waiting Indicator
Patent:
6,868,155 →
Application:
09/412,178 →
Multifunction Lead Frame and Integrated Circuit Package Incorporating the Same
Patent:
6,351,033 →
Application:
09/413,605 →
Method of Creating an Interconnect in a Substrate and Semiconductor Device Employing the Same
Patent:
6,222,255 →
Application:
09/428,073 →
Thin Film Transistors
Patent:
6,136,702 →
Application:
09/450,525 →
Dual Damascene Bond Pad Structure for Lowering Stress and Allowing Circuitry Under Pads
Patent:
6,838,769 →
Application:
09/465,089 →
Article Comprising Oxide-Bondable Solder
Patent:
6,306,516 →
Application:
09/466,449 →
Capacitor for Integration with Copper Damascene Processes
Patent:
6,498,364 →
Application:
09/489,092 →
High Performance Multi-Chip Ic Package
Patent:
6,678,167 →
Application:
09/498,005 →
Method and Apparatus for Reduced State Sequence Estimation with Tap-Selectable Decision-Feedback
Patent:
6,744,814 →
Application:
09/540,031 →
Diffusion Barrier Spikes for Lll-V Stuctures
Patent:
6,437,372 →
Application:
09/540,474 →
System and Method for Selectively Detaching Point-to-Point Protocol Header Information
Patent:
7,062,574 →
Application:
09/568,687 →
Semiconductor device having a metal gate with a work function compatible with a semiconductor device
Patent:
6,383,879 →
Application:
09/572,060 →
Integrated Circuit Package
Patent:
6,509,642 →
Application:
09/628,067 →
High Speed Low Voltage Semiconductor Devices Method of Fabricating
Patent:
6,537,867 →
Application:
09/630,463 →
Multi-Mode Decoding for Digital Audio Broadcasting and Other Applications
Patent:
6,874,115 →
Application:
09/632,423 →
Use of Small Openings in Large Topography Features to Improve Dielectric Thickness Control and a Method of Manufacture Thereof
Patent:
6,555,910 →
Application:
09/651,661 →
Method and Apparatus for Video Transmission Over a Heterogeneous Network Using Progressive Video Coding
Patent:
6,920,179 →
Application:
09/680,709 →
Remote Control Help Feature
Patent:
6,795,011 →
Application:
09/699,633 →
Inter-Wiring-Layer Capacitors
Kinetically Controlled Solder
Capacitor for Integration with Copper Damascene Processes and a Method of Manufacture Therefore
Related Assignments
(20)
Other recorded transfers of the patents in this record — the chain of ownership.
Patent Security Agreement
May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
Assignment of Assignor's Interest
Feb 20, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035059/0001 →
Merger
Feb 20, 2015
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
Reel/Frame 035058/0895 →
Merger
Feb 20, 2015
From: AGERE SYSTEMS GUARDIAN CORP.
To: AGERE SYSTEMS INC.
Reel/Frame 035058/0884 →
Termination and Release of Security Interest in Patent Rights (Releases Rf 032856-0031)
Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
Patent Security Agreement
Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
Termination and Release of Security Interest in Patents
Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
Assignment of Assignor's Interest
Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044886/0608 →
Assignment of Assignor's Interest
Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044415/0144 →
Assignment of Assignor's Interest
Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044886/0001 →
Assignment of Assignor's Interest
Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044886/0766 →
Security Interest
Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
Assignment of Assignor's Interest
Sep 24, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047022/0620 →
Corrective Assignment to Correct the Nature of Conveyance and Effective Date Previously Recorded on Reel 047022 Frame 0620. Assignor(S) Hereby Confirms the Merger.
Oct 2, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047185/0643 →
Corrective Assignment to Correct the Effective Date Previously Recorded on Reel 047185 Frame 0643. Assignor(S) Hereby Confirms the Merger.
Oct 26, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047476/0845 →
Corrective Assignment to Correct the Effective Date of Merger Previously Recorded at Reel: 047185 Frame: 0643. Assignor(S) Hereby Confirms the Corrective Merger.
Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047959/0296 →
Release of Security Interest
Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059720/0001 →
Security Interest
Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 060885/0001 →
Release of Security Interest
Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059723/0382 →
Release of Security Interest
Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059720/0719 →