Patent Assignment
Reel/Frame 046181/0465
Assignment of Assignor's Interest
Recorded: 2018-06-22
Received: 2018-06-22
Pages: 6
Assignor
GLOBALFOUNDRIES INC
Executed: 2018-06-20
Assignee
SPANSION LLC
198 CHAMPION COURT, SAN JOSE, CA, 95134, UNITED STATES
Covered Properties
(30)
System and Method for Manufacturing Self-Aligned Sti with Single Poly
Application:
14/865,563 →
System and Method for Manufacturing Self-Aligned Sti with Single Poly
Application:
14/167,845 →
Self-Aligned Si Rich Nitride Charge Trap Layer Isolation for Charge Trap Flash Memory
Application:
14/019,192 →
Self-Aligned Si Rich Nitride Charge Trap Layer Isolation for Charge Trap Flash Memory
Application:
12/699,635 →
Memory System with Poly Metal Gate
Application:
11/735,241 →
Dielectric extension to mitigate short channel effects
Application:
11/724,725 →
Methods and Systems for Recovering Data in a Nonvolatile Memory Array
Application:
11/724,774 →
Methods and systems for memory devices
Application:
60/877,478 →
Dielectric extension to mitigate short channel effects
Application:
60/877,300 →
Memory System with Poly Metal Gate
Application:
60/871,421 →
Zero Interface Polysilicon to Polysilicon Gate for Flash Memory
Application:
11/614,801 →
Self-Aligned Sti with Single Poly for Manufacturing a Flash Memory Device
Application:
11/639,667 →
Damascene Metal-Insulator-Metal (Mim) Device
Application:
11/633,929 →
Bit Line Implant
PCT:
PCTUS2006039547 ↗
Triple Layer Anti-Reflective Hard Mask
PCT:
PCTUS2006039538 ↗
Sonos Memory Cell Having High-K Dielectric
PCT:
PCTUS2006028813 ↗
Method of Forming a Contact in a Semiconductor Device with Engineered Plasma Treatment Profile of Barrier Metal Layer
Application:
11/388,976 →
Isolation Region Bird's Beak Suppression
Application:
11/258,209 →
Triple Layer Anti-Reflective Hard Mask
Application:
11/256,184 →
Bit Line Implant
Application:
11/254,769 →
Sonos Memory Cell Having High-K Dielectric
Application:
11/196,434 →
Method for Manufacturing a Memory Device Having a Nanocrystal Charge Storage Region
Application:
11/116,538 →
Method for Manufacturing a Memory Device Having a Nanocrystal Charge Storage Region
Application:
11/116,551 →
Radical Oxidation for Bitline Oxide of Sonos
Application:
11/113,507 →
Method for Forming Memory Array Bitlines Comprising Epitaxially Grown Silicon and Related Structure
Application:
11/112,607 →
Method for manufacturing a contact for a semiconductor component and related structure
Application:
11/109,965 →
Method for Manufacturing a Semiconductor Component That Inhibits Formation of Wormholes
Application:
11/109,964 →
Film Stacks to Prevent Uv-Induced Device Damage
Application:
11/091,524 →
Non-Volatile Memory Device with Increased Reliability
Application:
11/063,560 →
Non-Volatile Memory Device with Improved Erase Speed
Application:
11/049,855 →