IP Library › Granted Patent US 12,237,424
Granted Patent B2
US 12,237,424 · App. 18/524,033 · Granted Feb 25, 2025

Semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Hideomi Suzawa (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L29/4908H01L29/517H01L29/518H01L29/78648
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Quick Facts
Patent No.
US 12,237,424
App. No.
18/524,033
Granted
Feb 25, 2025
Kind
B2
Abstract

A transistor that is to be provided has such a structure that a source electrode layer and a drain electrode layer between which a channel formation region is sandwiched has regions projecting in a channel length direction at lower end portions, and an insulating layer is provided, in addition to a gate insulating layer, between the source and drain electrode layers and a gate electrode layer. In the transistor, the width of the source and drain electrode layers is smaller than that of an oxide semiconductor layer in the channel width direction, so that an area where the gate electrode layer overlaps with the source and drain electrode layers can be made small. Further, the source and drain electrode layers have regions projecting in the channel length direction at lower end portions.

Claims (79)

1. A semiconductor device comprising:

a first transistor;

a first insulating layer over the first transistor;

a second transistor over the first insulating layer; and

a capacitor electrically connected to the first transistor and the second transistor,

wherein the first transistor comprises:

a semiconductor layer comprising silicon;

a first gate insulating layer over the semiconductor layer;

a first gate electrode layer over the first gate insulating layer; and

a first source electrode layer and a first drain electrode layer over the semiconductor layer,

wherein the first insulating layer is provided over the first gate electrode layer and comprises silicon and nitrogen,

wherein the second transistor comprises:

a second gate electrode layer over the first insulating layer;

a second gate insulating layer over the second gate electrode layer;

an oxide semiconductor layer over the second gate insulating layer, the oxide semiconductor layer comprising In, Ga, and Zn,

a third gate insulating layer over the oxide semiconductor layer;

a third gate electrode layer over the third gate insulating layer; and

a second source electrode layer and a second drain electrode layer each having a region being in contact with a top surface of the oxide semiconductor layer,

wherein one of the second source electrode layer and the second drain electrode layer is electrically connected to the first gate electrode layer,

wherein a first electrode of the capacitor comprises a part of the one of the second source electrode layer and the second drain electrode layer,

wherein a second electrode of the capacitor comprises a first conductive layer provided over the one of the second source electrode layer and the second drain electrode layer, and

wherein a part of the first conductive layer overlaps with the first gate electrode layer.

2. The semiconductor device according to claim 1 , wherein the second gate electrode layer has a tapered shape.

3. The semiconductor device according to claim 1 , wherein the second gate electrode layer comprises an element selected from the group consisting of Mo, Ti, Ta, W, Al, Cu, and Cr.

4. The semiconductor device according to claim 1 , wherein the second gate insulating layer has a stacked structure comprising a first insulating film including nitrogen and a second insulating film including oxygen and provided over the first insulating film.

5. The semiconductor device according to claim 1 , wherein each of the second source electrode layer and the second drain electrode layer comprises an element selected from the group consisting of Al, Cr, Cu, Ta, Ti, Mo, and W.

6. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer does not overlap with a channel formation region of the first transistor.

7. A semiconductor device comprising:

a first transistor;

a first insulating layer over the first transistor;

a second transistor over the first insulating layer; and

a capacitor electrically connected to the second transistor,

wherein the first transistor comprises:

a semiconductor layer comprising silicon;

a first gate insulating layer over the semiconductor layer;

a first gate electrode layer over the first gate insulating layer; and

a first source electrode layer and a first drain electrode layer over the semiconductor layer,

wherein the first insulating layer is provided over the first gate electrode layer and comprises silicon and nitrogen,

wherein the second transistor comprises:

a second gate electrode layer over the first insulating layer;

a second gate insulating layer over the second gate electrode layer;

an oxide semiconductor layer over the second gate insulating layer, the oxide semiconductor layer comprising In, Ga, and Zn,

a third gate insulating layer over the oxide semiconductor layer;

a third gate electrode layer over the third gate insulating layer; and

a second source electrode layer and a second drain electrode layer each having a region being in contact with a top surface of the oxide semiconductor layer,

wherein one of the second source electrode layer and the second drain electrode layer is electrically connected to the first gate electrode layer,

wherein a first electrode of the capacitor comprises a part of the one of the second source electrode layer and the second drain electrode layer, and

wherein a second electrode of the capacitor comprises a first conductive layer provided over the one of the second source electrode layer and the second drain electrode layer.

8. The semiconductor device according to claim 7 , wherein the second gate electrode layer has a tapered shape.

9. The semiconductor device according to claim 7 , wherein the second gate electrode layer comprises an element selected from the group consisting of Mo, Ti, Ta, W, Al, Cu, and Cr.

10. The semiconductor device according to claim 7 , wherein the second gate insulating layer has a stacked structure comprising a first insulating film including nitrogen and a second insulating film including oxygen and provided over the first insulating film.

11. The semiconductor device according to claim 7 , wherein each of the second source electrode layer and the second drain electrode layer comprises an element selected from the group consisting of Al, Cr, Cu, Ta, Ti, Mo, and W.

12. The semiconductor device according to claim 7 , wherein the oxide semiconductor layer does not overlap with a channel formation region of the first transistor.

13. A semiconductor device comprising:

a first transistor;

a first insulating layer over the first transistor;

a second transistor over the first insulating layer; and

a capacitor electrically connected to the second transistor,

wherein the first transistor comprises:

a semiconductor layer comprising silicon;

a first gate insulating layer over the semiconductor layer;

a first gate electrode layer over the first gate insulating layer; and

a first source electrode layer and a first drain electrode layer over the semiconductor layer,

wherein the first insulating layer is provided over the first gate electrode layer and comprises silicon and nitrogen,

wherein the second transistor comprises:

a second gate electrode layer over the first insulating layer;

a second gate insulating layer over the second gate electrode layer;

an oxide semiconductor layer over the second gate insulating layer, the oxide semiconductor layer comprising at least indium,

a third gate insulating layer over the oxide semiconductor layer;

a third gate electrode layer over the third gate insulating layer; and

a second source electrode layer and a second drain electrode layer each having a region being in contact with a top surface of the oxide semiconductor layer,

wherein one of the second source electrode layer and the second drain electrode layer is electrically connected to the first gate electrode layer,

wherein a first electrode of the capacitor comprises a part of the one of the second source electrode layer and the second drain electrode layer, and

wherein a second electrode of the capacitor comprises a first conductive layer provided over the one of the second source electrode layer and the second drain electrode layer.

14. The semiconductor device according to claim 13 , wherein the second gate electrode layer has a tapered shape.

15. The semiconductor device according to claim 13 , wherein the second gate electrode layer comprises an element selected from the group consisting of Mo, Ti, Ta, W, Al, Cu, and Cr.

16. The semiconductor device according to claim 13 , wherein the second gate insulating layer has a stacked structure comprising a first insulating film including nitrogen and a second insulating film including oxygen and provided over the first insulating film.

17. The semiconductor device according to claim 13 , wherein each of the second source electrode layer and the second drain electrode layer comprises an element selected from the group consisting of Al, Cr, Cu, Ta, Ti, Mo, and W.

18. The semiconductor device according to claim 13 , wherein the oxide semiconductor layer does not overlap with a channel formation region of the first transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2023
From: YAMAZAKI, SHUNPEI; SUZAWA, HIDEOMI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 065712/0032 →
Priority Claims (1)
JP 2012-104286 · Apr 30, 2012 · national
Continuity (6)
Continuation 17563238 · Dec 28, 2021
Continuation 16554723 · Aug 29, 2019
Continuation 15597237 · May 17, 2017
Continuation 14722260 · May 27, 2015
Continuation 13868420 · Apr 23, 2013
Related Publication 20240105853A1 · Mar 28, 2024
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