IP Library › Assignment 016621/0875

Patent Assignment

Reel/Frame 016621/0875

Assignment of Assignor's Interest

Recorded: 2005-10-10 Pages: 4

View PDF Order Certified Copy

Assignor

SIEMENS AKTIENGESELLSCHAFT

Executed: 2005-09-27

Assignee

INFINEON TECHNOLOGIES AG

ST.-MARTIN-STR. 53, MUNICH, 81669, GERMANY

Covered Properties (33)

Cmos Differential Comparator with Offset Voltage

Patent: 5,043,599 →

Application: 07/412,895 →

Integratable Switched-Capacitor Sigma-Delta Modulator

Patent: 5,057,839 →

Application: 07/520,521 →

Analog/Digital Converter Operating by the Expanded Parallel Method

Patent: 5,072,220 →

Application: 07/655,735 →

Dma Controller Having Channel-Specific Instruction Registers and a Data Handling Unit for Independently Controlling Channel Specific Information Transfer

Patent: 5,208,915 →

Application: 07/742,172 →

Method for Manufacturing a Polycrystalline Layer on a Substrate

Patent: 5,213,670 →

Application: 07/745,957 →

Method of Forming Shallow Junctions in Field Effect Transistors

Patent: 5,268,317 →

Application: 07/790,953 →

Error Amplifier

Patent: 5,337,009 →

Application: 08/046,124 →

Switchable Current Source Circuit and Phase Detector Configuration Having Such a Circuit

Patent: 5,461,304 →

Application: 08/064,845 →

Method of Fabricating a High-Voltage, Vertical-Trench Semiconductor Device

Patent: 5,445,974 →

Application: 08/120,147 →

Method for Producing a Metallization Level Having Contacts and Interconnects Connecting the Contacts

Patent: 5,422,309 →

Application: 08/167,020 →

Apparatus for Furnishing Instructions in a Microprocessor with a Multi - Stage Pipeline Processing Unit for Processing Instruction Phase and Having a Memory and at Least Three Additional Memory Units

Patent: 5,454,090 →

Application: 08/224,080 →

Switched Capacitor Network

Patent: 5,557,187 →

Application: 08/297,618 →

Inverter Stage Having Diode Load and Ring Oscillator Using Same

Patent: 5,521,558 →

Application: 08/333,739 →

Circuit Configuration for Synchronous Clock Generation of at Least Two Clock Signals

Patent: 5,469,083 →

Application: 08/340,259 →

Manufacturing Method for a Self-Aligned Through Hole and Semiconductor Structure

Patent: 5,460,690 →

Application: 08/373,006 →

Circuit Configuration for Generating a Controlled Output Voltage

Patent: 5,654,628 →

Application: 08/564,502 →

Prevention of Abnormal Wsix Oxidation by in-Situ Amorphous Silicon Deposition

Patent: 5,804,499 →

Application: 08/642,294 →

Crack Stop Formation for High-Productivity Processes

Patent: 5,776,826 →

Application: 08/642,983 →

Semiconductor Array with Self-Adjusted Contacts

Patent: 5,864,155 →

Application: 08/651,305 →

Circuit Configuration for Generating an Enable Signal for a Clock-Controllable Circuit

Patent: 5,739,708 →

Application: 08/715,931 →

Method of Producing an Aluminum Film

Patent: 5,993,908 →

Application: 08/864,277 →

Execution of a Loop Instructing in a Loop Pipeline After Detection of a First Occurrence of the Loop Instruction in an Integer Pipeline

Patent: 6,076,159 →

Application: 08/928,766 →

Method and Arrangement for Data Transmission Between Units on a Bus System Selectively Transmitting Data in One of a First and a Second Data Transmission Configurations

Patent: 6,032,178 →

Application: 09/005,696 →

Method and Circuit Configuration for Controlling Operating States of a Second Device by Means of a First Device

Patent: 5,994,931 →

Application: 09/010,172 →

Process for Chemical Vapor Deposition Layer Production on a Semiconductor Surface with Absorbing Protective Glasses

Patent: 6,194,314 →

Application: 09/019,612 →

Comparator for a Wide Supply Voltage Range

Patent: 6,215,333 →

Application: 09/049,394 →

Read Only Memory