Patent Assignment
Reel/Frame 017388/0868
Termination & Release of Patent Security Agreement
Recorded: 2006-01-03
Received: 2006-01-06
Pages: 25
Assignor
CITICORP NORTH AMERICA, INC.
Executed: 2005-11-28
Assignee
AMKOR TECHNOLOGY, INC.
1900 SOUTH PRICE ROAD, CHANDLER, AZ, 85248, UNITED STATES
Covered Properties
(62)
Optic Semiconductor Package
Application:
10/227,054 →
Method of Making a Semiconductor Package Including Stacked Semiconductor Dies
Application:
10/224,864 →
Plastic Integrated Circuit Package and Leadframe for Making the Package
Application:
10/171,702 →
Semiconductor Package Including Isolated Ring Structure
Application:
10/142,222 →
Lead Frame with Plated End Leads and Recesses
Application:
10/122,598 →
Low Profile Mounting of Thick Integrated Circuit Packages Within Low-Profile Circuit Modules
Application:
10/094,731 →
Thin Semiconductor Package with Semiconductor Chip and Electronic Discrete Device
Application:
10/086,293 →
Integrated Circuit Package Mounting
Application:
10/068,717 →
Sensor Module with Integrated Discrete Components
Application:
10/012,378 →
Printed Circuit Board with Integral Heat Sink for Semiconductor Package
Application:
10/006,642 →
Power Semiconductor Package with Strap
Application:
10/008,048 →
Semiconductor Package with Optimized Leadframe Bonding Strength
Application:
09/998,844 →
Apparatus and Method for Allowing Testing of Semiconductor Devices at Different Temperatures
Application:
09/978,535 →
Semiconductor Package with Singulation Crease
Application:
09/976,866 →
Semiconductor Package Having Stacked Semiconductor Chips and Method of Making the Same
Application:
09/974,541 →
Semiconductor Package Having Multiple Dies with Independently Biased Back Surfaces
Application:
09/953,422 →
Quick Sealing Glass-Lidded Package
Application:
09/946,750 →
Method and Circuit Module Package for Automated Switch Actuator Insertion
Application:
09/934,040 →
Semiconductor Package Having Substrate with Laser-Formed Aperture Through Solder Mask Layer
Application:
09/932,528 →
Integrated Circuit Package Including Pin and Barrel Interconnects
Application:
09/932,109 →
Laser Defined Pads for Flip Chip on Leadframe Package
Application:
09/929,239 →
Laser Defined Pads for Flip Chip on Leadframe Package Fabrication Method
Application:
09/929,428 →
Reduced Thickness Packaged Electronic Device
Application:
09/916,716 →
Pre-Drilled Ball Grid Array Package
Application:
09/916,848 →
Method for Forming a Reduced Thickness Packaged Electronic Device
Application:
09/916,719 →
Integrated Circuit Chip Package Having an Internal Lead
Application:
09/909,160 →
Method for Molding Semiconductor Package Having a Ceramic Substrate
Application:
09/895,767 →
Pre-Drilled Image Sensor Package
Application:
09/895,994 →
Structure for Backside Saw Cavity Protection
Application:
09/895,996 →
Method of Making a Chip Carrier Package Using Laser Ablation
Application:
09/888,950 →
Method and Apparatus for Attaching Multiple Metal Components to Integrated Circuit Modules
Application:
09/884,357 →
Integrated Circuit Package Having Posts for Connection to Other Packages and Substrates
Application:
09/881,344 →
Hermetic Ceramic Semiconductor Package
Application:
09/881,343 →
Personalized Circuit Module Package and Method for Packaging Circuit Modules
Application:
09/880,277 →
Image Sensing Component Package and Manufacture Method Thereof
Application:
09/871,993 →
Active Heat Sink for Cooling a Semiconductor Chip
Application:
09/866,100 →
Plastic Integrated Circuit Device Package Having Exposed Lead Surface
Application:
09/863,359 →
Sheet Resin Composition
Application:
09/851,564 →
Shielded Semiconductor Leadframe Package
Application:
09/848,864 →
Heat Spreader with Spring Ic Package Fabrication Method
Application:
09/839,288 →
Heat Spreader with Spring Ic Package
Application:
09/839,284 →
Method of Making a Plastic Pakage for an Optical Integrated Circuit Device
Application:
09/839,861 →
Vacuum Sealed Package for Semiconductor Chip
Application:
09/839,305 →
Making Leadframe Semiconductor Packages with Stacked Dies and Interconnecting Interposer
Application:
09/828,046 →
Making Semiconductor Devices Having Stacked Dies with Biased Back Surfaces
Application:
09/828,396 →
Semiconductor Package with Molded Substrate and Recessed Input/Output Terminals
Application:
09/827,619 →
Thermally Enhanced Chip Scale Lead on Chip Semiconductor Package
Application:
09/825,785 →
Mounting for a Package Containing a Chip
Application:
09/813,485 →
Semiconductor Package with Warpage Resistant Substrate
Application:
09/812,426 →
Structure for Protecting a Micromachine with a Cavity in a Uv Tape
Application:
09/811,183 →
Micromirror Device Package
Application:
09/804,749 →
Micromirror Device Package Fabrication Method
Application:
09/804,805 →
Structure Including Electronic Components Singulated Using Laser Cutting
Application:
09/797,759 →
Method of Singulation Using Laser Cutting
Application:
09/797,756 →
Printed Circuit Board for Semiconductor Package and Method for Manufacturing the Same
Application:
09/783,797 →
Semiconductor Module Package Substrate
Application:
09/770,859 →
Semiconductor Module Package Substrate Fabrication Method
Application:
09/770,861 →
Structure for Fabricating a Special-Purpose Die Using a Polymerizable Tape
Application:
09/764,190 →
Method for Fabricating a Special-Purpose Die Using a Polymerizable Tape
Application:
09/764,166 →
Method for Forming a Bond Wire Pressure Sensor Die Package
Application:
09/754,229 →
Method for Forming a Flip Chip Pressure Sensor Die Package
Application:
09/754,239 →
Bond Wire Pressure Sensor Die Package
Application:
09/754,393 →