Patent Assignment
Reel/Frame 056246/0533
Assignment of Assignor's Interest
Recorded: 2021-05-14
Pages: 39
Assignor
HANGER SOLUTIONS, LLC
Executed: 2020-05-15
Assignee
FOOTHILLS IP LLC
2465 S MADISON ST., DENVER, COLORADO, 80210
Covered Properties
(204)
Video Processor System, and Also Imaging System and Image Storage System Provided with Such a Video Processor System
Application:
07/290,979 →
Efficient Execution of Programs with Conditional Branches on Very Long Instruction Word Machines
Application:
07/578,976 →
Vliw Processing Device Including Improved Memory for Avoiding Collisions Without an Excessive Number of Ports
Application:
07/594,534 →
Multiport Memory Bypass Under Software Control
Patent:
5,313,551 →
Application:
07/654,847 →
Vlim Processor with Less Instruction Issue Slots Than Functional Units
Application:
07/998,080 →
Vliw Processing Device Including Improved Memory for Avoiding Collisions Without an Excessive Number of Ports
Application:
08/063,850 →
Vliw Processor Which Uses Path Information Generated by a Branch Control Unit to Inhibit Operations Which Are Not on a Correct Path
Patent:
5,450,556 →
Application:
08/142,648 →
Circuits, Systems, and Methods for Accounting for Defective Cells in a Memory Device
Application:
08/340,163 →
Exception Recovery in a Data Processing System
Patent:
5,832,202 →
Application:
08/358,127 →
Multiport Register File to Accommodate Data of Differing Lengths
Patent:
6,370,623 →
Application:
08/366,958 →
Vliw Processing Device Including Improved Memory for Avoiding Collisions Without an Excessive Number of Ports
Patent:
5,692,139 →
Application:
08/425,697 →
Vliw Processor with Less Instruction Issue Slots Than Functional Units
Application:
08/445,963 →
Method of Recognizing Hand-Written Characters and an Apparatus for Recognizing the Same
Application:
08/468,309 →
Low Pin Count-Wide Memory Devices and Systems and Methods Using the Same
Patent:
5,537,353 →
Application:
08/521,867 →
Apparatus for Cooling a Memory Storage Device
Patent:
5,673,029 →
Application:
08/602,011 →
Dynamic Random Access Memory
Patent:
5,796,671 →
Application:
08/609,401 →
Low Pin Count-Wide Memory Devices Using Non-Multiplexed Addressing and Systems and Methods Using the Same
Patent:
5,600,606 →
Application:
08/612,113 →
Systems and Methods for Implementing Inter-Device Cell Replacements
Patent:
5,657,281 →
Application:
08/613,316 →
Memory System with Multiplexed Input-Output Port and Memory Mapping Capability
Patent:
5,835,965 →
Application:
08/637,073 →
"Multibank - Multiport Memories and Systems and Methods Using the Same"
Patent:
5,815,456 →
Application:
08/666,814 →
Dual Port Memories and Systems and Methods Using the Same
Patent:
5,844,856 →
Application:
08/666,815 →
Write Control Unit
Patent:
5,862,399 →
Application:
08/715,060 →
Nethod and Apparatus for Aliasing Memory Data in an Advanced Microprocessor
Patent:
5,926,832 →
Application:
08/721,698 →
Circuits, Systems, and Methods for Accounting for Defective Cells in a Memory Device
Patent:
6,513,130 →
Application:
08/726,568 →
Cached Synchronous Dram Architecture Allowing Concurrent Dram Operations
Patent:
5,787,457 →
Application:
08/731,790 →
Cached Synchronous Dram Architecture Having a Mode Register Programmable Cache Policy
Application:
08/733,841 →
Snoop Cache Memory Control System and Method
Patent:
5,913,226 →
Application:
08/779,154 →
Dynamic Random Access Memory
Patent:
6,335,896 →
Application:
08/792,419 →
Dynamic Random Access Memory
Patent:
6,413,830 →
Application:
08/794,004 →
Method and Apparatus for Allocation and Management of Shared Memory with Data in Memory Stored as Multiple Linked Lists
Patent:
5,893,162 →
Application:
08/796,085 →
Method of Recognizing Hand-Written Characters and an Apparatus for Recognizing the Same
Patent:
5,812,697 →
Application:
08/800,374 →
Element-To-Element Interconnection in Semiconductor Device
Patent:
5,856,691 →
Application:
08/802,354 →
Nonvolatile Semiconductor Memory Device Having Stacked-Gate Type Transistor
Patent:
5,780,894 →
Application:
08/802,946 →
Vliw Processor with Less Instruction Issue Slots Than Functional Units
Patent:
6,002,880 →
Application:
08/810,003 →
Memory Efficient Channel Decoding Circuitry
Patent:
5,946,293 →
Application:
08/824,028 →
Split Sense Amplifier and Staging Buffer for Wide Memory Architecture
Patent:
5,991,209 →
Application:
08/827,856 →
Flash Memory Protection Attribute Status Bits Held in a Flash Memory Array
Patent:
5,930,826 →
Application:
08/833,599 →
Memory Device with on-Chip Manufacturing and Memory Cell Defect Detection Capability
Patent:
5,748,545 →
Application:
08/834,775 →
First-In, First-Out Integrated Circuit Memory Device Utilizing a Dynamic Random Access Memory Array for Data Storage Implemented in Conjuction with an Associated Static Random Access Memory Cache
Patent:
5,901,100 →
Application:
08/840,118 →
Non-Volatile Semiconductor Memory
Patent:
5,962,890 →
Application:
08/841,583 →
Enhanced Signal Processing Random Access Memory Device Utilizing a Dram Memory Array Integrated with an Associated Sram Cache and Internal Refresh Control
Patent:
5,991,851 →
Application:
08/850,802 →
Method and Apparatus for Transferring Data in a Dual Port Memory
Patent:
6,510,098 →
Application:
08/864,506 →
Memory Storage Device Housing and Cooling Device
Patent:
5,886,639 →
Application:
08/871,621 →
Node-Precise Voltage Regulation for a Mos Memory System
Patent:
5,835,420 →
Application:
08/884,251 →
Computer System Having a Common Display Memory and Main Memory
Patent:
6,057,862 →
Application:
08/886,237 →
Dram with Integral Sram and Arithmetic-Logic Units
Patent:
5,953,738 →
Application:
08/886,952 →
Low Latency Dram Cell and Method Therefor
Patent:
5,856,940 →
Application:
08/911,737 →
Content Addressable Memory System with Cascaded Memories and Self Timed Signals
Patent:
6,230,236 →
Application:
08/919,227 →
Content Addressable Memory System with Self-Timed Signals and Cascaded Memories for Propagating Hit Signals
Patent:
6,122,707 →
Application:
08/923,633 →
Content Addressable Memory
Patent:
5,859,791 →
Application:
08/923,823 →
Content Addressable Memory
Patent:
5,943,252 →
Application:
08/923,824 →
Serial Flash Memory
Patent:
5,953,254 →
Application:
08/926,576 →
Computer System Controller Having Internal Memory and External Memory Control
Patent:
6,118,462 →
Application:
08/926,666 →
Convectively Cooled Memory Storage Device Housing
Patent:
6,185,097 →
Application:
08/926,874 →
Memory Management Appartus That Replaces Defective Storage Locations with Functional Storage Locations
Patent:
6,065,090 →
Application:
08/944,824 →
Polyload Sram Memory Cell with Low Stanby Current
Patent:
5,852,573 →
Application:
08/946,827 →
Non-Volatile and Memeory Fabricated Using a Dynamic Memory Process and Method Therefor
Patent:
6,222,216 →
Application:
08/955,045 →
Single Chip Controller- Memory Device Including Feature- Selectable Bank I/O and Architecture and Methods Suitable for Implementing the Same
Patent:
6,018,793 →
Application:
08/957,242 →
Content Adressable Memory Device
Patent:
5,905,668 →
Application:
08/958,402 →
Folded Read-Only Memory
Patent:
5,825,683 →
Application:
08/959,892 →
Prefetch Management in Cache Memory
Patent:
6,134,633 →
Application:
08/961,963 →
Computer System Cache Memory and Process for Cache Enry Replacement with Selective Locking of Elements in Different Ways and Groups
Patent:
6,047,358 →
Application:
08/961,965 →
High Speed Translation Lookaside Buffer Employing Content Address Memory
Patent:
6,012,131 →
Application:
08/964,903 →
Apparatus for Mapping Memory Pcmcia Cards into I/O Window Address Space to Select an Internal Register and Perform Read and Write Operations Using an Index Mechanism
Patent:
6,079,623 →
Application:
08/965,766 →
Method and System for Latching an Address for Accessing Synchronous Random Access Memory Using a Single Address Status Signal Control Line
Patent:
6,044,432 →
Application:
08/968,555 →
Bi-Layer Programmable Resistor Memory
Patent:
5,936,880 →
Application:
08/969,567 →
Flash Eeprom Device
Patent:
5,960,285 →
Application:
08/975,490 →
Semiconductor Memory Device Capable of Page Mode or Serial Access Mode
Patent:
5,953,244 →
Application:
08/976,296 →
Flash Memory Having Low Threshold Voltage Distribution
Patent:
5,978,278 →
Application:
08/977,194 →
Z-Buffer for Row Addressable Graphics Memory with Flash Fill
Patent:
5,933,156 →
Application:
08/984,170 →
Methods and Circuits for Sngle-Memory Cell Multivalue Data Storage
Patent:
5,991,191 →
Application:
08/985,943 →
Apparatus and Method for a Cache Coherent Shared Memory Multiprocessing System
Patent:
6,065,077 →
Application:
08/986,430 →
Memory Architecture and Systems and Methods Using the Same
Patent:
5,940,329 →
Application:
08/992,416 →
Serial Access System Semiconductor Storage Device Capable of Reducing Access Time and Consumption Current
Patent:
5,815,444 →
Application:
08/995,272 →
Method of Fabricating a Dynamic Random Access Memory Device
Patent:
6,114,200 →
Application:
08/996,697 →
Split-Gate Flash Memory Cell Structure
Patent:
5,907,172 →
Application:
08/998,312 →
Method of Manufacturing a Split-Gate Flash Memory Cell
Patent:
5,872,036 →
Application:
08/998,331 →
Low Voltage, Low Current Hot-Hole Injection Erase and Hot-Electron Programmable Flash Memory with Enhanced Endurance
Patent:
5,953,255 →
Application:
08/998,418 →
Memory Having Selectable Output Strength
Patent:
5,864,506 →
Application:
09/006,772 →
Method of Fabricating a Capacitor of a Dynamic Random Access Memory
Patent:
6,153,465 →
Application:
09/008,863 →
Non-Volatile Memory Device Using Afm and Method for Operating the Device
Patent:
5,978,256 →
Application:
09/015,136 →
Low Latency Memories and Systems Using the Same
Patent:
5,963,468 →
Application:
09/016,559 →
Write Control Method for Memory Devices
Patent:
5,889,728 →
Application:
09/021,681 →
Electrically-Programmable Read-Only Memory Fabricated Using a Dynamic Random Access Memory Fabrication Process and Methods for Programming Same
Patent:
5,995,409 →
Application:
09/045,259 →
Circuitry and Methods for Dynamically Sensing of Data in a Static Random Access Memory Cell
Patent:
5,978,293 →
Application:
09/045,757 →
Multiple-Bit Random-Access Memory Array
Patent:
6,005,793 →
Application:
09/052,518 →
Nonvolatile Semiconductor Memory Device Having a Multi-Layer Electric Charge-Capturing Film
Application:
09/053,492 →
A Composite Gate Structure Memory Cell Having Increased Capacitance
Patent:
6,288,423 →
Application:
09/059,590 →
Double Gate Dram Memory Cell
Patent:
6,064,589 →
Application:
09/072,879 →
Dynamic Random Acess Memory System with Simultaneous Access and Refresh Operations and Methods for Using the Same
Patent:
5,963,497 →
Application:
09/080,813 →
Test Method of Cache Memory of Multiprocessor System
Patent:
6,170,070 →
Application:
09/084,925 →
Vliw Processor with Write Control Unit for Allowing Less Write Buses Than Functional Units
Patent:
6,044,451 →
Application:
09/090,038 →
Dielectric Device, Dielectric Memory and Method of Fabricating the Same
Patent:
6,194,752 →
Application:
09/094,592 →
A System and a Method for Processing Information About Locations of Defective Memory Cells and a Memory Test Apparatus with Defect, Compression Means
Patent:
6,269,455 →
Application:
09/101,332 →
Apparatus and Method for Improving Computer Memory Speed and Capacity
Patent:
5,953,215 →
Application:
09/105,892 →
High-Performance Lru Memory Capable of Supporting Multiple Ports
Patent:
6,138,211 →
Application:
09/107,418 →
Multi-Array Memory Device, and Associated Method, Having Shared Decoder Circuitry
Patent:
6,064,620 →
Application:
09/111,822 →
Method of Forming Electrostatic Discharge Protection Structure of Dynamic Random Access Memory
Patent:
6,008,081 →
Application:
09/126,285 →
Methods and Circuits for Single-Memory Dynamic Cell Multivalue Data Storage
Patent:
6,005,799 →
Application:
09/130,136 →
Design Information Memory for Configurable Integrated Circuits
Patent:
6,498,361 →
Application:
09/140,087 →
Dual Port Random Access Memories and Systems Using the Same
Patent:
6,256,256 →
Application:
09/141,490 →
Dynamic Random Access Memory Word Line Boost Technique Employing a Boost-on-Writes Policy
Patent:
6,055,192 →
Application:
09/146,726 →
Bias Condition and X-Decoder Circuit of Flash Memory Array
Patent:
5,978,277 →
Application:
09/159,793 →
Method for Acccomplishing Lowered Granularity of a Distributed Shared Memory
Patent:
6,263,414 →
Application:
09/161,810 →
Method and Apparatus for Address Transfers, System Serialization, and Centralized Cache and Transaction Control, in a Symetric Multiprocessor System
Patent:
6,292,705 →
Application:
09/163,294 →
Multi-Bank Esdram with Cross -Coupled Sram Cache Registers
Patent:
6,249,840 →
Application:
09/178,298 →
Method for Fabricating an Embedded Dynamic Random Access Memory Using Self-Aligned Silicide Technology
Patent:
6,133,130 →
Application:
09/181,530 →
Flash Memory Structure and Method of Manufacture
Patent:
6,071,776 →
Application:
09/186,748 →
Node-Precise Voltage Regulation for a Mos Memory System
Patent:
6,009,022 →
Application:
09/189,109 →
Power Source Design for Embedded Memory
Patent:
5,970,011 →
Application:
09/198,900 →
Method for Manufacutring Lower Electrode of Dram Capacitor
Patent:
6,403,411 →
Application:
09/208,601 →
Content Addressable Memory Programmable Array
Patent:
6,114,873 →
Application:
09/213,259 →
Double Data Rate Synchronous Dynamic Random Access Memory Device Incorporating a Static Ram Cache Per Memory Bank
Patent:
6,330,636 →
Application:
09/236,804 →
Method for Fabricating an Embedded Dynamic Random Access Memory
Patent:
6,337,240 →
Application:
09/237,496 →
Repair Circuit of Memory Cell Array
Patent:
6,026,037 →
Application:
09/240,821 →
Content Addressable Memory Storage Device
Patent:
6,044,005 →
Application:
09/243,263 →
Method of Fabricating a Dram Capacitor
Patent:
6,218,243 →
Application:
09/252,127 →
System for Reducing Processor Workloads with Memory Remapping Techniques
Patent:
6,393,498 →
Application:
09/260,637 →
Semi-Conductor Device with a Memory Cell
Patent:
5,999,442 →
Application:
09/264,946 →
First-In, First-Out Integrated Circuit Memory Device Incorporating a Retransmit Function
Patent:
6,072,741 →
Application:
09/266,472 →
Vliw Processor with Less Instruction Issue Slots Thatn Functional Units
Patent:
6,122,722 →
Application:
09/271,202 →
Channel Interface and Protocols for Cache Coherency in a Scalable Symmetric Multiprocessor System
Patent:
6,516,442 →
Application:
09/281,749 →
Method of Manufacturing Flash Memory
Patent:
6,060,357 →
Application:
09/286,139 →
Dynamic Random Access Memory System with a Static Random Access Memory Interface and Methods for Using the Same
Patent:
6,233,193 →
Application:
09/295,641 →
Integrated Circuit Having Dynamic Memory with Boosted Plateline
Patent:
6,219,270 →
Application:
09/316,558 →
Serial Flash Memory
Patent:
6,058,045 →
Application:
09/318,200 →
Memory Device Having a Chip Select Speedup Feature and Associated Methods
Patent:
6,169,702 →
Application:
09/320,207 →
Memory Device Having Reduced Power Requirements and Associated Methods
Patent:
6,181,641 →
Application:
09/320,227 →
Reduced -Pitch 6-Transistor Nmos Content-Addressable-Memory Cell
Patent:
6,188,594 →
Application:
09/328,957 →
Memory Array Bitline Timing Circuit
Patent:
6,172,925 →
Application:
09/333,178 →
Micro-Controller Unit for Accessing External Memory Using Microcode
Patent:
6,343,353 →
Application:
09/342,091 →
Fully Connected Cache Coherent Multiprocessing Systems
Patent:
6,633,945 →
Application:
09/349,641 →
Method of and Apparatus for Precharging and Equalizing Local Input/Output Signal Lines Within a Memory Circuit
Patent:
6,141,275 →
Application:
09/357,739 →
Novel Erase Condition for Flash Memory
Patent:
6,134,150 →
Application:
09/360,315 →
Cached Synchronous Dram Architecture Having a Mode Register Programmable Cache Policy
Patent:
6,289,413 →
Application:
09/360,373 →
Nmos Dynamic Content-Addressable-Memory Cam Cell with Self-Booting Pass Transistors and Local Row and Column Select
Patent:
6,078,513 →
Application:
09/375,979 →
System and a Method for Defining Transforms of Memory Device Addresses
Patent:
6,366,995 →
Application:
09/377,172 →
Novel Approach to Provide High External Voltage for Flash Memory Erase
Patent:
6,166,961 →
Application:
09/377,545 →
Apparatus and Method for Terminating a Computer Memory Bus
Patent:
6,266,252 →
Application:
09/394,975 →
Pipeline Replay Support for Unaligned Memory Operations
Patent:
6,728,865 →
Application:
09/420,748 →
System and a Method for Transformation of Memory Device Addresses
Patent:
6,393,543 →
Application:
09/423,804 →
Dynamic Random Access Memory with Write-Without-Restore and Systems and Methods Using the Same
Patent:
6,222,786 →
Application:
09/432,307 →
Software Direct Memory Access
Patent:
6,668,287 →
Application:
09/464,661 →
Array Architecture And Process Flow Of Nonvolatile Memory Devices For Mass Storage Applications
Patent:
6,258,668 →
Application:
09/487,501 →
Content addressable memory system with self-timed signals and cascaded memories for propagating hit signals
Patent:
6,219,749 →
Application:
09/501,583 →
Arrays of two-transistor, one-capacitor dynamic random access memory cells with interdigitated bitlines
Patent:
6,256,221 →
Application:
09/507,106 →
Enhanced bus turnaround integrated circuit dynamic random access memory device
Patent:
6,151,236 →
Application:
09/515,007 →
Flash memory structure and method of manufacture
Patent:
6,281,544 →
Application:
09/521,984 →
Content addressable memory cells and systems and devices using the same
Patent:
6,310,880 →
Application:
09/527,351 →
Stacked Gate Flash Memory Cell with Reduced Disturb Conditions
Patent:
6,660,585 →
Application:
09/531,787 →
Multi-array memory device, and associated method, having shared decoder circuitry
Patent:
6,278,646 →
Application:
09/533,923 →
First-In, first-out integrated circuit memory device incorporating a retransmit function
Patent:
6,172,927 →
Application:
09/536,072 →
Computer system controller having internal memory and external memory control
Application:
09/541,413 →
Publication:
US 2001/0040580
Memory Architecture and Systems and Methods Using the Same
Patent:
6,418,063 →
Application:
09/543,241 →
Random Access Memory Cell Having Double-Gate Access Transistor for Reduced Leakage Current
Patent:
6,661,699 →
Application:
09/546,747 →
Self-equalized low poer precharge sense amp for high speed srams
Patent:
6,301,179 →
Application:
09/570,064 →
Apparatus and Method for a Cache Coherent Shared Memory Multiprocessing System
Patent:
6,457,087 →
Application:
09/570,832 →
Packet-Based Integrated Circuit Dynamic Random Access Memory Device Incorporating an on-Chip Row Register Cache to Reduce Data Access Latencies
Patent:
6,373,751 →
Application:
09/571,135 →
Low-Noise Memory Device Having a High Sampling Frequency
Patent:
6,741,281 →
Application:
09/571,454 →
Memory System Using Fet Switches to Select Memory Banks
Patent:
6,446,158 →
Application:
09/572,641 →
Content addressable memory system with cascaded memories and self timed signals
Patent:
6,301,636 →
Application:
09/572,861 →
Enhanced bus turnaround integrated circuit dynamic random access memory device
Patent:
6,301,183 →
Application:
09/626,623 →
Method of Making Multi-Level Type Non-Volatile Semiconductor Memory Device
Patent:
6,596,590 →
Application:
09/679,649 →
Multi-Level Type Nonvolatile Semiconductor Memory Device
Patent:
6,469,343 →
Application:
09/679,650 →
Multi-level type nonvolatile semiconductor memory device
Patent:
6,285,596 →
Application:
09/679,651 →
Novel approach to provide high external voltage for flash memory erase
Patent:
6,240,027 →
Application:
09/693,503 →
A Non-Volatile Semiconductor Memory Having Split-Gate Memory Cells Mirrored in a Virtual Ground Configuration
Patent:
6,717,846 →
Application:
09/696,085 →
Structure and Method for Hiding Dram Cycle Time Behind a Burst Access
Patent:
6,501,698 →
Application:
09/703,765 →
Segmented Memory Architecture and Systems and Methods Using the Same
Patent:
6,396,764 →
Application:
09/715,669 →
Removable Memory Storage Device Carrier Having a Heat Sink
Distributed Shared Memory System with Variable Granularity
Content Addressable Memory Cells and Systems and Devices Using the Same
Method Fo Forming a Submerged Semiconductor Structure.
Method and Apparatus for Address Transfers, System Serialization, and Centralized Cache and Transaction Control, in a Symetric Multiprocessor System
Patent:
6,466,825 →
Application:
09/927,717 →
Packet-Based Integrated Circuit Dynamic Random Access Memory Device Incorporating an on-Chip Row Register Cache to Reduce Data Access Latencies
Multi-Level Type Nonvolatile Semiconductor Memory Device
Computer System Controller Having Internal Memory and External Memory Control
Application:
10/201,492 →
Publication:
US 2002/0171649
Multi-Level Type Nonvolatile Semiconductor Memory Device
Packet-Based Integrated Circuit Dynamic Random Access Memory Device Incorporating an on-Chip Row Register Cache to Reduce Data Access Latencies
Random Access Memory Cell Having Reduced Leakage Current
Patent:
6,661,702 →
Application:
10/350,653 →
Pipeline Replay Support for Unaligned Memory Operations
Patent:
7,134,001 →
Application:
10/463,223 →
Stacked gate flash memory cell with reduced disturb conditions
Application:
10/616,751 →
Publication:
US 2004/0008561
Random Access Memory Cell Having Reduced Current Leakage and Having a Pass Transistor Control Gate Formed in a Trench
Patent:
6,934,180 →
Application:
10/675,042 →
Array Architecture and Process Flow of Nonvolatile Memory Devices for Mass Storage Applications
A Non-Volatile Semiconductor Memory Having Split-Gate Memory Cells Mirrored in a Virtual Ground Configuration
Application:
10/790,579 →
Publication:
US 2004/0165459
Semiconductor Memory Device Including a Double-Gate Dynamic Random Access Memory Cell Having Reduced Current Leakage
Method of and Apparatus for Providing Look Ahead Column Redundancy Access Within a Memory
Patent:
41,013 →
Application:
11/140,527 →
Computer System Controller Having Internal Memory and External Memory Control
Patent:
41,413 →
Application:
11/351,220 →
Pipeline Replay Support for Unaligned Memory Operations
Patent:
7,886,135 →
Application:
11/594,672 →
Method for Fabricating a Semiconductor Storage Device Having an Increased Dielectric Film Area
Patent:
42,004 →
Application:
11/655,744 →
Multi-level type nonvolatile semiconductor memory device
Application:
11/812,223 →
Computer System Controller Having Internal Memory and External Memory Control
Application:
12/562,983 →
Serial Flash Memory
Application:
60/025,698 →
Content Adressable Memory
Application:
60/037,834 →
Computer Data Bus Isolation on Memory Modules
Application:
60/067,210 →
Double Gate Dram Memory Cell
Application:
60/073,349 →
Bias Condition and X-Decoder Circuit of Flash Memory Array
Application:
60/080,845 →
Method for Fine-Grain Distributed Virtual Shared Memory
Application:
60/093,232 →
Double Bus Rate
Application:
60/134,511 →
Self-Equalized Low Power Precharge Sense Amp for High Speed Memory
Application:
60/137,224 →
Double Bus Rate Memory Addressing
Application:
60/141,219 →
Array Architecture and Process Flow of Non-Volatile Memory Devices for Mass Storage Application
Application:
60/167,527 →
Self-equalized low power precharge sense amp for high speed memory
Application:
60/181,559 →
Fine-grain sharing in page-based dsms
Application:
60/183,313 →
Related Assignments
(14)
Other recorded transfers of the patents in this record — the chain of ownership.
Merger
Sep 29, 2015
From: INTELLECTUAL VENTURE FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036711/0160 →
Corrective Assignment to Correct the Assignor's Name Previously Recorded at Reel: 036711 Frame: 0160. Assignor(S) Hereby Confirms the Merger.
Oct 6, 2015
From: INTELLECTUAL VENTURES FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036797/0356 →
Merger
Oct 23, 2015
From: LEGION ADVANCES LLC
To: XYLON LLC
Reel/Frame 036942/0157 →
Merger
Dec 17, 2015
From: STEINBECK CANNERY LLC
To: ZARBAÑA DIGITAL FUND LLC
Reel/Frame 037319/0984 →
Merger
Jan 21, 2016
From: GROMENS ACQUISITIONS CO. L.L.C.
To: CUFER ASSET LTD. L.L.C
Reel/Frame 037553/0300 →
Merger
Jan 29, 2016
From: INTELLECTUAL VENTURES FUND 74 LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 037625/0564 →
Release of Security Interest
Sep 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC
To: NXP B.V.
Reel/Frame 050315/0443 →
Assignment of Assignor's Interest
Jan 4, 2020
From: INTELLECTUAL VENTURES ASSETS 158 LLC
To: HANGER SOLUTIONS, LLC
Reel/Frame 051486/0425 →
Assignment of Assignor's Interest
Jan 5, 2020
From: INTELLECTUAL VENTURES ASSETS 161 LLC
To: HANGER SOLUTIONS, LLC
Reel/Frame 052159/0509 →
Assignment of Assignor's Interest
Feb 1, 2020
From: INTELLECTUAL VENTURES HOLDING 81 LLC
To: INTELLECTUAL VENTURES ASSETS 158 LLC
Reel/Frame 051777/0017 →
Assignment of Assignor's Interest
Feb 2, 2020
From: NYTELL SOFTWARE LLC
To: INTELLECTUAL VENTURES ASSETS 158 LLC
Reel/Frame 051777/0173 →
Assignment of Assignor's Interest
Feb 2, 2020
From: INTELLECTUAL VENTURES II LLC
To: INTELLECTUAL VENTURES ASSETS 158 LLC
Reel/Frame 051777/0107 →
Assignment of Assignor's Interest
Feb 10, 2020
From: CUFER ASSET LTD. L.L.C.
To: INTELLECTUAL VENTURES ASSETS 161 LLC
Reel/Frame 051873/0365 →
Assignment of Assignor's Interest
Feb 17, 2020
From: INTELLECTUAL VENTURES I LLC
To: INTELLECTUAL VENTURES ASSETS 161 LLC
Reel/Frame 051945/0001 →