IP Library Assignment 051799/0956
Patent Assignment
Reel/Frame 051799/0956

Assignment of Assignor's Interest

Recorded: 2020-02-04 Pages: 26
Assignors
MICROCHIP TECHNOLOGY INC.
Executed: 2020-02-03
ATMEL CORPORATION
Executed: 2020-02-03
MICROSEMI CORPORATION
Executed: 2020-02-03
Assignee
SONRAI MEMORY LIMITED
4-5 BURTON HALL ROAD, SANDYFORD, DUBLIN, 18, IRELAND
Covered Properties (57)
Modified Harvard Architecture Processor Having Data Memory Space Mapped to Program Memory Space with Erroneous Execution Protection
Patent: 7,007,172 →
Application: 09/870,460 →
Publication: US 2003/0005245
Device Generating a Precise Reference Voltage
Patent: 6,650,175 →
Application: 10/071,605 →
Publication: US 2002/0136065
Power-On Reset Circuit
Patent: 6,744,291 →
Application: 10/232,636 →
Publication: US 2004/0041601
Raw Material for Shadow Mask for Color Image Receiving Tube
Patent: 6,917,150 →
Application: 10/312,388 →
Publication: US 2003/0168960
Method for Counting Beyond Endurance Limitations of Non-Volatile Memories
Patent: 6,792,065 →
Application: 10/348,782 →
Publication: US 2004/0141580
Variable Charge Pump Circuit with Dynamic Load
Patent: 6,724,241 →
Application: 10/352,733 →
Publication: US 2004/0080360
Portable Ram Drive
Patent: 6,920,527 →
Application: 10/364,583 →
Publication: US 2004/0158674
Temperature-Compensated Current Reference Circuit
Patent: 6,809,575 →
Application: 10/407,622 →
Publication: US 2004/0051580
Regenerative Clock Repeater
Patent: 7,436,232 →
Application: 10/666,142 →
Publication: US 2004/0257131
Differential Charge Pump
Patent: 6,876,244 →
Application: 10/687,980 →
Publication: US 2005/0083090
Integrating Chip Scale Packaging Metallization into Integrated Circuit Die Structures
Patent: 6,900,538 →
Application: 10/760,434 →
Publication: US 2004/0245633
Peripheral Device Feature Allowing Processors to Enter a Low Power State
Patent: 7,159,766 →
Application: 10/762,767 →
Publication: US 2005/0156038
High Frequency Differential Power Amplifier
Patent: 6,937,071 →
Application: 10/802,894 →
Publication: US 2005/0206412
Fuse Data Storage System Using Core Memory
Patent: 7,102,950 →
Application: 10/910,038 →
Publication: US 2006/0023549
Increment/Decrement, Chip Select and Selectable Write to Non-Volatile Memory Using a Two Signal Control Protocol for an Integrated Circuit Device
Patent: 7,199,603 →
Application: 10/946,432 →
Publication: US 2006/0023543
Integrating Chip Scale Packaging Metallization into Integrated Circuit Die Structures
Patent: 7,211,893 →
Application: 10/980,536 →
Publication: US 2005/0062156
Nonvolatile Latch
Patent: 7,336,542 →
Application: 11/049,334 →
Publication: US 2006/0171201
Method and Circuit Arrangement for Holding a Control State During Inadequate Power Supply in an Rf Transponder or Remote Sensor
Patent: 7,746,216 →
Application: 11/058,056 →
Publication: US 2005/0179520
Method and Apparatus for a Dual Power Supply to Embedded Non-Volatile Memory
Patent: 7,120,061 →
Application: 11/061,799 →
Publication: US 2005/0219903
Electric Reference Voltage Generating Device of Improved Accuracy and Corresponding Electronic Integrated Circuit
Patent: 7,218,167 →
Application: 11/062,888 →
Publication: US 2005/0206443
Modified Harvard Architecture Processor Having Data Memory Space Mapped to Program Memory Space with Erroneous Execution Protection
Patent: 7,243,372 →
Application: 11/135,527 →
Publication: US 2005/0210284
Circuit for Current Measurement and Current Monitoring
Patent: 7,075,464 →
Application: 11/137,463 →
Publication: US 2005/0270198
Efficient Charge Pump for a Wide Range of Supply Voltages
Patent: 7,259,612 →
Application: 11/168,833 →
Publication: US 2006/0290410
Sense Amplifier Circuit for Parallel Sensing of Four Current Levels
Patent: 7,330,375 →
Application: 11/203,938 →
Publication: US 2006/0256619
Compact Cmos Esd Layout Techniques with Either Fully Segmented Salicide Ballasting (Fssb) in the Source and/or Drain Regions
Patent: 7,646,063 →
Application: 11/451,610 →
Method and Apparatus to Prevent High Voltage Supply Degradation for High-Voltage Latches of a Non-Volatile Memory
Patent: 7,369,446 →
Application: 11/457,377 →
Publication: US 2008/0056015
Electrically Disconnecting a Peripheral Device
Patent: 7,325,733 →
Application: 11/530,977 →
Publication: US 2007/0023499
Apparatus for Eliminating Leakage Current of a Low Vt Device in a Column Latch
Patent: 7,453,725 →
Application: 11/539,564 →
Publication: US 2008/0084767
Method and Apparatus for a Dual Power Supply to Embedded Non-Volatile Memory
Patent: 7,450,429 →
Application: 11/539,567 →
Publication: US 2007/0086248
Adaptive Gate Voltage Regulation
Patent: 7,417,904 →
Application: 11/554,797 →
Publication: US 2008/0101133
Amplitude Controlled Sawtooth Generator
Patent: 7,671,642 →
Application: 11/610,107 →
Publication: US 2008/0143394
Differential Amplitude Controlled Sawtooth Generator
Patent: 7,336,110 →
Application: 11/624,139 →
Clock Circuitry for Ddr-Sdram Memory Controller
Patent: 7,423,928 →
Application: 11/668,844 →
Publication: US 2008/0181046
Method for Enhancing Linearity of a Transistor Amplifier Using Switched Capacitive Loads
Patent: 7,508,266 →
Application: 11/846,959 →
Method and Apparatus to Prevent High Voltage Supply Degradation for High-Voltage Latches of a Non-Volatile Memory
Patent: 7,751,256 →
Application: 11/933,805 →
Publication: US 2008/0056020
Differential Amplitude Controlled Sawtooth Generator
Patent: 7,800,419 →
Application: 12/014,261 →
Publication: US 2008/0174346
Low Power Mode Fault Recovery Method, System and Apparatus
Patent: 7,908,516 →
Application: 12/017,521 →
Publication: US 2008/0238472
Error Detecting/Correcting Scheme for Memories
Patent: 8,112,699 →
Application: 12/031,289 →
Publication: US 2009/0210774
Adaptive Electrostatic Discharge (Esd) Protection of Device Interface for Local Interconnect Network (Lin) Bus and the Like
Patent: 7,876,540 →
Application: 12/174,802 →
Publication: US 2009/0128969
Adaptive Electrostatic Discharge (Esd) Protection of Device Interface for Local Interconnect Network (Lin) Bus and the Like
Patent: 7,885,047 →
Application: 12/174,903 →
Publication: US 2009/0128970
Clock Circuitry for Ddr-Sdram Memory Controller
Patent: 7,679,987 →
Application: 12/207,147 →
Publication: US 2009/0010083
Dual Mode, Single Ended to Fully Differential Converter Structure
Patent: 7,843,232 →
Application: 12/395,518 →
Publication: US 2010/0219864
Cyclic Digital to Analog Converter
Patent: 8,223,056 →
Application: 12/436,620 →
Publication: US 2010/0283651
Circuit and Method for Operating a Circuit
Patent: 8,193,792 →
Application: 12/481,330 →
Publication: US 2009/0302821
Methods for Forming Fully Segmented Salicide Ballasting (Fssb) in the Source and/or Drain Region
Patent: 7,985,644 →
Application: 12/606,691 →
Circuit and Method for Adjusting an Offset Output Current for an Input Current Amplifier
Patent: 8,289,082 →
Application: 12/977,034 →
Publication: US 2011/0148380
Error Detecting/Correcting Scheme for Memories
Patent: 8,214,729 →
Application: 13/335,725 →
Publication: US 2012/0096334
Circuit and Method for Operating a Circuit
Patent: 8,415,939 →
Application: 13/485,426 →
Publication: US 2012/0236674
Circuit and Method for Adjusting an Offset Output Current for an Input Current Amplifier
Patent: 8,760,227 →
Application: 13/652,166 →
Publication: US 2013/0043952
Integrated Technique for Enhanced Power Amplifier Forward Power Detection
Patent: 8,947,164 →
Application: 13/894,221 →
Publication: US 2013/0307624
Increment/decrement, chip select and selectable write to non-volatile memory using a two signal control protocol for an integrated circuit device
Application: 60/593,035 →
Systems and methods for fabricating MOSFETs with ESD (electrostatic discharge) protection
Application: 60/690,701 →
Low Power Mode Fault Recovery Method, System and Apparatus
Application: 60/908,328 →
Adaptive Electrostatic Discharge (ESD) Protection of Device Interface for Local Interconnect Network (LIN) Bus and the Like
Application: 60/989,514 →
Schaltung Und Verfahren Zum Betrieb Einer Schaltung
Application: 61/060,626 →
Schaltung Und Verfahren Zur Einstellung Eines Offsetausgangsstroms Fuer Einen Eingangsstromverstaerker
Application: 61/289,846 →
Integrated Technique for Enhanced Power Amplifier Forward Power Detection
Application: 61/648,721 →
Related Assignments (17)
Other recorded transfers of the patents in this record — the chain of ownership.
Patent Security Agreement Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
Termination and Release of Security Interest in Patent Collateral Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
Security Interest Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
Security Interest Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
Merger Dec 11, 2017
From: STANDARD MICROSYSTEMS CORPORATION
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 044820/0715 →
Security Interest Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
Security Interest Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
Merger Dec 16, 2019
From: MICREL, INCORPORATED
To: MICREL LLC
Reel/Frame 051295/0334 →
Assignment of Assignor's Interest Dec 16, 2019
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 051291/0211 →
Corrective Assignment to Correct the Correct Patent Number 6876244 Previously Recorded at Reel: 051295 Frame: 0334. Assignor(S) Hereby Confirms the Assignment. Dec 18, 2019
From: MICREL, INCORPORATED
To: MICREL LLC
Reel/Frame 051345/0367 →
Release of Security Interest Dec 21, 2019
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; ATMEL CORPORATION
Reel/Frame 051398/0809 →
Release of Security Interest Dec 21, 2019
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; ATMEL CORPORATION
Reel/Frame 051398/0827 →
Release of Security Interest Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059333/0222 →
Release of Security Interest Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
Release of Security Interest Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 059666/0545 →
Release of Security Interest Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059358/0001 →
Assignment of Assignor's Interest Mar 9, 2024
From: SONRAI MEMORY LIMITED
To: NERA INNOVATIONS LIMITED
Reel/Frame 066778/0178 →