IP Library › Assignment 009483/0420
Patent Assignment
Reel/Frame 009483/0420

Change of Name

Recorded: 1998-09-28 Pages: 8
Assignor
SGS-THOMSON MICROELECTRONICS, INC.
Executed: 1998-05-19
Assignee
STMICROELECTRONICS, INC.
M/S 2346, 1310 ELECTRONICS DRIVE, CARROLLTON, TEXAS, 75006
Covered Properties (62)
Integrated Circuit Device Structure Having Halo Regions
Patent: 5,894,158 →
Application: 07/769,185 →
Stress Test Mode
Patent: 5,835,427 →
Application: 08/172,854 →
Mosfet Isolation Structure with Planar Surface
Patent: 5,874,769 →
Application: 08/182,809 →
Method of Gettering Using Doped Sog and a Planarization Technique
Patent: 5,869,388 →
Application: 08/407,767 →
Method of Forming a Field Programmable Device
Patent: 5,856,233 →
Application: 08/434,179 →
Contacts for Semiconductor Devices
Patent: 5,847,465 →
Application: 08/436,165 →
Integrated Circuit Structure Having Two Photoresist Layers
Patent: 5,869,175 →
Application: 08/441,778 →
Semiconductor Contact via Structure and Method
Patent: 5,841,195 →
Application: 08/448,703 →
Input Buffer Circuit Immune to Common Mode Power Supply Fluctuations
Patent: 5,831,457 →
Application: 08/477,283 →
Inverted Field-Effect Device with Polycrystalline Silicon/Germanium Channel
Patent: 5,801,396 →
Application: 08/488,398 →
Structure and Process for Reducing the on-Resistance of Mos-Gated Power Devices
Patent: 5,869,371 →
Application: 08/552,383 →
Semiconductor Device with Back to Back Diode Element
Patent: 5,831,326 →
Application: 08/552,440 →
Submicron Contacts and Vias in an Integrated Circuit
Patent: 5,847,460 →
Application: 08/574,659 →
Test Mode Activation and Data Override
Patent: 6,144,594 →
Application: 08/587,709 →
Circuit and Method for Setting the Time Duration of a Write to a Memory Cell
Patent: 5,864,696 →
Application: 08/587,711 →
Data-Input Device for Generating Test Signals on Bit and Bit-Complement Lines
Patent: 5,845,059 →
Application: 08/588,762 →
Testing and Repair of Embedded Memory
Patent: 5,841,784 →
Application: 08/626,540 →
Method of Making Spacer-Type Thin-Film Polysilicon Transistor for Low-Power Memory Devices
Patent: 5,804,472 →
Application: 08/644,078 →
Apparatus for Testing Signal Timing and Programming Delay
Patent: 5,841,789 →
Application: 08/647,222 →
Process Monitor Test Chip and Methodology
Patent: 5,831,446 →
Application: 08/679,138 →
Method of Forming an Improved Planar Isolation Structure in an Integrated Circuit
Patent: 5,834,360 →
Application: 08/690,738 →
Inverted Field-Effect Device with Polycrystalline Silicon/Germanium Channel
Patent: 5,821,136 →
Application: 08/698,129 →
Video and/or Audio Decompression and/or Compression Device That Shares a Memory Interface
Patent: 5,812,789 →
Application: 08/702,911 →
Isolation by Active Transistors with Grounded Gates
Patent: 5,821,600 →
Application: 08/704,153 →
Integrated-Circuit Die Suitable for Wafer-Level Testing and Method for Forming the Same
Patent: 5,861,660 →
Application: 08/710,356 →
Structure for Transistor Devices in an Sram Cell
Patent: 5,825,070 →
Application: 08/712,808 →
Plastic Pin Grid Array Package
Patent: 5,808,870 →
Application: 08/720,686 →
Motor with Input-Controlled High Side Driver
Patent: 5,859,511 →
Application: 08/723,713 →
Driver Circuit Including Slew Rate Control System with Improved Voltage Ramp Generator
Patent: 5,825,218 →
Application: 08/736,524 →
Structure and Method of Forming Vias
Patent: 5,847,457 →
Application: 08/738,040 →
Driver Circuit Including Amplifier Operated in a Switching Mode
Patent: 5,828,245 →
Application: 08/740,129 →
Vias and Contact Plugs with an Aspect Ratio Lower Than the Aspect Ratio of the Structure in Which They Are Formed
Patent: 5,856,707 →
Application: 08/743,380 →
Low-Profile Socketed Packaging System with Land-Grid Array and Thermally Conductive Slug
Patent: 5,805,419 →
Application: 08/756,460 →
Nethod of Forming a Landing Pad Structure in an Integrated Circuit
Patent: 5,828,130 →
Application: 08/758,340 →
Tructure and Method of Forming an Enlarged Head on a Plug to Eliminate the Enclosure Requirement
Patent: 5,872,053 →
Application: 08/758,723 →
Synchronizing an Audio-Visual Stream Synchronized to a Clock with a Video Display That Is Synchronized to a Different Clock
Patent: 5,951,690 →
Application: 08/762,608 →
Sram Memory Cell Design Having Complementary Dual Pass Gates
Patent: 5,831,897 →
Application: 08/766,404 →
An Improved Dielectric in an Integrated Circuit
Patent: 5,811,865 →
Application: 08/767,343 →
Integrated Circuit Sensing and Digitally Biasing the Threshold Voltage of Transistors and Related Methods
Patent: 5,834,966 →
Application: 08/770,548 →
Esd Protection Circuits
Patent: 6,025,746 →
Application: 08/771,670 →
Method and Apparatus for Testing High-Frequency Integrated Circuits Using a Lower-Frequency Tester
Patent: 5,805,611 →
Application: 08/773,068 →
Method of Making and Structure of Sram Storage Cell with N Channel Thin Film Transistor Load Devices
Patent: 5,870,330 →
Application: 08/774,911 →
Liquid Level Gauge Interface System Having Dynamic Offset
Patent: 5,866,797 →
Application: 08/775,643 →
Method of Making Multiple-Bond Shelf Plastic Package
Patent: 5,832,596 →
Application: 08/777,635 →
Amplifier Output Clamping Scheme
Patent: 5,877,914 →
Application: 08/782,524 →
Load Pole Stabilized Voltage Regulator Circuit
Patent: 5,850,139 →
Application: 08/808,455 →
Method and Apparatus for Reducing a Noise Differential in an Electronic Circuit
Patent: 5,942,951 →
Application: 08/814,332 →
Pwm Control of Motor Driver
Patent: 5,869,946 →
Application: 08/814,932 →
Voice Coil Motor Feedback Control Circuit
Patent: 5,818,180 →
Application: 08/819,597 →
Field Effect Transistor Having Dielectrically Isolated Sources and Drains
Patent: 5,856,696 →
Application: 08/820,406 →
Protection Against Adverse Parasitic Effects in Junction-Isolated Integrated Circuits
Patent: 5,834,826 →
Application: 08/853,143 →
Circuit and Method for Terminating a Write to a Memory Cell
Patent: 5,825,691 →
Application: 08/858,788 →
Method of Stress Testing Integrated Circuit Having Memory and Integrated Circuit Having Stress Tester for Memory Thereof
Patent: 5,883,844 →
Application: 08/862,969 →
Bemf Rectification During Power Off to Prevent Parasitic Effect
Patent: 5,883,479 →
Application: 08/886,324 →
Voltage Regulator with Load Pole Stabilization
Patent: 5,852,359 →
Application: 08/889,816 →
Contact Structure for Improving Photoresist Adhesion on a Dielectric Layer
Patent: 5,877,541 →
Application: 08/905,918 →
Electroluminescent Lamp Driver Circuit with Signal Tracking
Patent: 5,854,539 →
Application: 08/918,859 →
Memory-Row Selector Having a Test Function
Patent: 5,848,018 →
Application: 08/926,833 →
Clocked Sense Amplifier with Wordline Tracking
Patent: 5,828,622 →
Application: 08/944,649 →
Circuit for Improving Back Emf Detection in Pulse Width Modulation Mode
Patent: 5,866,998 →
Application: 08/957,088 →
Structure for Deselective Broken Select Lines in Memory Arrays
Patent: 36,319 →
Application: 08/966,042 →
Enhanced Planarization Technique for an Integrated Circuit
Patent: 5,837,613 →
Application: 08/976,760 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignors Interest. Sep 30, 1991
From: WEI, CHI-CHIA
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 005865/0222 →
Assignment of Assignor's Interest Dec 22, 1993
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006828/0888 →
Assignment of Assignor's Interest Aug 21, 1995
From: CHAN, TSIU CHIU; HAN, YU-PIN; GURITZ, ELMER H.; BLANCHARD, RICHARD A,.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007620/0100 →
Assignment of Assignor's Interest Jan 19, 1996
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007900/0922 →
Assignment of Assignor's Interest Jan 19, 1996
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007847/0451 →
Assignment of Assignor's Interest Jan 19, 1996
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 008101/0414 →
Assignment of Assignor's Interest Mar 1, 1996
From: LIOU, FU-TAI; ZAMANIAN, MEHDI
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007812/0308 →
Assignment of Assignor's Interest Apr 2, 1996
From: CHAN, TSIU CHIU; ENG, LAWRENCE P.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007940/0379 →
Assignment of Assignor's Interest Jul 12, 1996
From: SO, JAMSON S.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 008097/0311 →
Assignment of Assignor's Interest Jul 31, 1996
From: TESAURO, MARK R.; BRYANT, FRANK R.
To: SGS-THOMSON MICROELECTRONICS, INC
Reel/Frame 008135/0550 →
Assignment of Assignor's Interest Aug 26, 1996
From: DIAZ, RAUL Z.; OWEN, JEFFERSON E.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 008202/0871 →
Assignment of Assignor's Interest Nov 13, 1996
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 008237/0052 →
Security Agreement Nov 27, 1996
From: SNAPPER, INC.
To: AMSOUTH BANK OF ALABAMA
Reel/Frame 008239/0719 →
Assignment of Assignor's Interest Jul 3, 2013
From: STMICROELECTRONICS, INC. (FORMERLY KNOWN AS SGS-THOMSON MICROELECTRONICS, INC.)
To: MICRON TECHNOLOGY, INC.
Reel/Frame 030740/0481 →
Release of Security Interest Apr 21, 2014
From: JPMORGAN CHASE BANK, N.A.
To: LEAR CORPORATION
Reel/Frame 032722/0553 →
Assignment of Assignor's Interest May 14, 2014
From: STMICROELECTRONICS, INC.
To: STMICROELECTRONICS INTERNATIONAL NV
Reel/Frame 032889/0929 →
Assignment of Assignor's Interest Dec 15, 2014
From: STMICROELECTRONICS INTERNATIONAL NV
To: ACACIA RESEARCH GROUP LLC
Reel/Frame 034510/0994 →
Assignment of Assignor's Interest Dec 16, 2014
From: ACACIA RESEARCH GROUP LLC
To: PARTHENON UNIFIED MEMORY ARCHITECTURE LLC
Reel/Frame 034651/0434 →
Security Interest May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Patent Security Agreement Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
Corrective Assignment to Correct the Replace Erroneously Filed Patent #7358718 with the Correct Patent #7358178 Previously Recorded on Reel 038669 Frame 0001. Assignor(S) Hereby Confirms the Security Interest. Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
Security Interest Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
Release of Security Interest Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
Release of Security Interest Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
Release of Security Interest Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →