Patent Assignment
Reel/Frame 019069/0088
Assignment of Assignor's Interest
Recorded: 2007-03-27
Pages: 6
Assignor
SPANSION INC.
Executed: 2007-01-31
Assignee
SPANSION LLC
915 DEGUIGNE DRIVE, P.O. BOX 3453, MAIL STOP 250, SUNNYVALE, CALIFORNIA, 94088-3453
Covered Properties
(35)
Method of Fabricating a High Dielectric Constant Interpolysilicon Dielectric Structure for a Low Voltage Non-Volatile Memory
Patent:
6,020,238 →
Application:
08/978,107 →
Method of Fabricating an Oxynitride-Capped High Dielectric Constant Interpolysilicon Dielectric Structure for a Low Voltage Non-Volatile Memory.
Patent:
6,025,228 →
Application:
08/978,398 →
Non-Volatile Trench Semiconductor Device Having a Shallow Drain Region
Patent:
6,124,608 →
Application:
08/992,961 →
Methodology for Achieving Dual Field Oxide Thicknesses
Patent:
6,228,746 →
Application:
08/993,149 →
Methodology for Achieving Dual Gate Oxide Thicknesses
Patent:
6,080,682 →
Application:
08/993,716 →
Non- Volatile Trench Semiconductor Device
Patent:
6,002,151 →
Application:
08/993,890 →
Trungsten Plug Formation
Patent:
6,235,632 →
Application:
09/006,495 →
Process for Fabricating a Flash Memory with Dual Function Control Lines
Patent:
6,001,689 →
Application:
09/008,415 →
Multiple Chip Hybrid Package Using Bump Technology
Patent:
6,100,593 →
Application:
09/032,362 →
Multi-Chip Packaging Using Bump Technology
Patent:
6,091,138 →
Application:
09/032,398 →
Elimination of Oxynitride (Ono) Etch Residue and Polysilicon Stringers Through Isolation of Floating Gates on Adjacent Bitlines by Polysilicon Oxidation
Patent:
6,043,120 →
Application:
09/033,723 →
Elimination of Oxynitride (Ono) Etch Residue and Polysilicon Stri Ngers Through Isolation of Floating Gates on Adjacent Bitlines by Polysilicon Oxidation
Patent:
6,110,833 →
Application:
09/033,836 →
Elimination of Oxynitride (Ono) Etch Residue and Polysilicon Stringers Through Isolation of Floating Gates on Adjacent Bitlines by Polysilicon Oxidation
Patent:
6,030,868 →
Application:
09/033,916 →
Large Angle Implantation to Prevent Field Turn-on Under Select Gate Transistor Field Oxide Region for Non-Volatile Memory Devices
Patent:
6,146,944 →
Application:
09/039,783 →
Trenched Gate Non-Volatile Semiconductor Device and Method with Corner Doping and Sidewall Doping
Patent:
5,990,515 →
Application:
09/052,062 →
Method for Simultaneous Deposition and Sputtering of Teos
Patent:
6,150,285 →
Application:
09/099,057 →
Page Buffer for a Multi-Level Flash Memory with a Limited Number of Latches Per Memory Cell
Patent:
5,930,172 →
Application:
09/103,041 →
Interlaced Storage and Sense Technique for Flash Multi-Level Devices
Patent:
5,973,958 →
Application:
09/103,046 →
Eeprom Having Stacked Dielectric to Increase Programming Speed
Patent:
6,369,421 →
Application:
09/106,177 →
Program/Verify Technique for Multi-Level Flash Cells Enabling Different Threshold Levels to Be Simultaneously Programmed
Patent:
6,091,631 →
Application:
09/108,529 →
Double Density Non-Volatile Memeory Cells
Patent:
6,118,147 →
Application:
09/110,446 →
Method for Manufacturing Memory Devices
Patent:
6,146,795 →
Application:
09/146,032 →
High Voltage Transistor with Low Body Effect and Low Leakage
Patent:
6,369,433 →
Application:
09/182,525 →
Low Dielectric Semiconductor Device with Rigid, Conductively Lined Interconnection System
Patent:
6,246,118 →
Application:
09/252,185 →
Data Pre-Reading and Error Correction Circuit for a Memory Device
Patent:
6,584,594 →
Application:
09/314,574 →
Method of Dual Use of Non-Volatile Memory for Error Correction
Patent:
6,438,726 →
Application:
09/314,575 →
Read Operation Scheme for a High-Density, Low Voltage, and Superior Reliability Nand Flash Memory Device
Patent:
6,175,522 →
Application:
09/408,846 →
Double Density Non-Volatile Memory Cells
Patent:
6,232,632 →
Application:
09/436,503 →
Elimination of Oxynitride (Ono) Etch Residue and Polysilicon Stringers Through Isolation of Floating Gates on Adjacent Bitlines by Polysilicon Oxidation
Patent:
6,455,888 →
Application:
09/506,298 →
Methodology for achieving dual gate oxide thicknesses
Patent:
6,232,244 →
Application:
09/562,442 →
Mask for and Method of Forming a Character on a Substrate
Patent:
6,713,842 →
Application:
09/639,798 →
Oxygen Implantation for Reduction of Junction Capacitance in Mos Transistors
Patent:
6,475,868 →
Application:
09/640,082 →
Method and apparatus for determining the robustness of memory cells to alpha-particle/cosmic ray induced soft errors
Patent:
6,348,356 →
Application:
09/664,636 →
Multiple Channel Implantation to Form Retrograde Channel Profile and to Engineer Threshold Voltage and Sub-Surface Punch-Through
Patent:
6,506,640 →
Application:
09/667,686 →
Method for Simultaneous Deposition and Sputtering of Teos and Device Thereby Formed
Patent:
6,566,252 →
Application:
09/689,144 →
Related Assignments
(16)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Mar 19, 2007
From: ADVANCED MICRO DEVICES, INC.
To: SPANSION INC.
Reel/Frame 019028/0650 →
Security Agreement
Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
Release of Security Interest
Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
Assignment of Assignor's Interest
Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036017/0473 →
Assignment of Assignor's Interest
Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036017/0625 →
Assignment of Assignor's Interest
Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036019/0156 →
Assignment of Assignor's Interest
Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036019/0518 →
Assignment of Assignor's Interest
Jun 26, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036017/0001 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036030/0001 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036027/0730 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036030/0196 →
Assignment of Assignor's Interest
Jun 29, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036034/0230 →
Partial Release of Security Interest in Patents
Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
Assignment of Assignor's Interest
Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
Assignment of Assignor's Interest
Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040908/0979 →
Release of Security Interest
Dec 22, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 041178/0061 →