IP Library Assignment 054279/0001
Patent Assignment
Reel/Frame 054279/0001

Release of Security Interest

Recorded: 2020-11-02 Pages: 74
Assignor
CPPIB CREDIT INVESTMENTS INC.
Executed: 2020-10-28
Assignee
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
515 LEGGET DRIVE, SUITE 704, OTTAWA, K2K 3G4, CANADA
Covered Properties (51)
Method and System for Packet Encryption
Patent: 6,959,346 →
Application: 09/741,829 →
Publication: US 2002/0087708
Content Addressable Memory Cell Having Improved Layout
Patent: 6,522,562 →
Application: 09/894,900 →
Publication: US 2002/0126519
Bitline Precharge
Patent: 6,504,775 →
Application: 09/956,917 →
Publication: US 2003/0016580
Cascaded Charge Pump Power Supply
Patent: 6,967,523 →
Application: 09/966,391 →
Publication: US 2002/0101744
Digitally Controlled Pulse Width Adjusting Circuit
Patent: 6,538,465 →
Application: 10/084,620 →
Low Power Content Addressable Memory Architecture
Patent: 6,584,003 →
Application: 10/134,753 →
Method and Apparatus for Reordering Entries in a Multi Probe Lookup
Patent: 7,277,426 →
Application: 10/156,725 →
Publication: US 2003/0218978
Method for allocating processor resources and system for encrypting data
Patent: 7,386,705 →
Application: 10/228,933 →
Publication: US 2004/0044898
Sorting Method and Apparatus Using a Cam
Patent: 6,990,552 →
Application: 10/286,743 →
Publication: US 2004/0088476
Method and Apparatus for Replacing Defective Rows in a Semiconductor Memory Array
Patent: 6,888,731 →
Application: 10/306,734 →
Publication: US 2004/0105289
Matchline Sensing for Content Addressable Memories
Patent: 6,717,876 →
Application: 10/329,461 →
Publication: US 2003/0137890
Wide Frequency Range Delay Locked Loop
Patent: 7,336,752 →
Application: 10/335,535 →
Publication: US 2004/0125905
Content Addressable Memory Cell Having Improved Layout
Patent: 6,873,532 →
Application: 10/351,593 →
Publication: US 2003/0161173
Synchronization Circuit and Method with Transparent Latches
Patent: 7,010,713 →
Application: 10/352,372 →
Publication: US 2004/0123175
Method and Apparatus for Interconnecting Content Addressable Memory Devices
Patent: 7,062,601 →
Application: 10/430,378 →
Publication: US 2004/0001380
Start Up Circuit for Delay Locked Loop
Patent: 7,477,716 →
Application: 10/647,664 →
Publication: US 2004/0264621
Block Programmable Priority Encoder in a Cam
Patent: 7,188,211 →
Application: 10/724,576 →
Publication: US 2005/0001744
Ternary Cam Cell for Reduced Matchline Capacitance
Patent: 7,120,040 →
Application: 10/856,783 →
Publication: US 2005/0276086
Content Addressable Memory Architecture
Patent: 7,002,824 →
Application: 10/912,768 →
Publication: US 2005/0068839
Timing Vernier Using a Delay Locked Loop
Patent: 7,038,517 →
Application: 11/037,365 →
Publication: US 2005/0122144
Method and System for Packet Encryption
Patent: 7,631,116 →
Application: 11/257,525 →
Publication: US 2006/0064510
Sorting Method and Apparatus Using a Cam
Patent: 7,124,268 →
Application: 11/263,144 →
Publication: US 2006/0069858
Synchronization Circuit and Method with Transparent Latches
Patent: 7,596,710 →
Application: 11/305,433 →
Publication: US 2006/0103439
Mismatch-Dependent Power Allocation Technique for Match-Line Sensing in Content-Addressable Memories
Patent: 7,227,766 →
Application: 11/320,746 →
Publication: US 2006/0104100
Sorting Method and Apparatus Using a Cam
Patent: 7,484,063 →
Application: 11/582,160 →
Publication: US 2007/0244893
Charge Pump for Pll/Dll
Patent: 7,408,391 →
Application: 11/636,876 →
Publication: US 2007/0080729
Low Power Match-Line Sensing Circuit
Patent: 7,511,980 →
Application: 11/747,428 →
Publication: US 2007/0206397
Content Addressable Memory Architecture
Patent: 7,502,245 →
Application: 11/787,667 →
Publication: US 2008/0025059
Congestion Level Management in a Network Device
Patent: 7,830,877 →
Application: 11/839,184 →
Publication: US 2008/0112401
Compare Circuit for a Content Addressable Memory Cell
Patent: 7,561,454 →
Application: 11/925,208 →
Publication: US 2008/0049482
Wide Frequency Range Delay Locked Loop
Patent: 8,000,430 →
Application: 11/999,162 →
Publication: US 2008/0089459
Timing Vernier Using a Delay Locked Loop
Patent: 7,671,650 →
Application: 12/144,186 →
Publication: US 2008/0252344
Charge Pump for Pll/Dll
Patent: 7,616,035 →
Application: 12/214,053 →
Publication: US 2008/0252342
Start Up Circuit for Delay Locked Loop
Patent: 7,656,988 →
Application: 12/315,289 →
Publication: US 2009/0086876
Charge Pump for Pll/Dll
Patent: 7,692,461 →
Application: 12/317,877 →
Publication: US 2009/0121760
Double Data Rate Output Latch for Static Ram Device Has Edge-Triggered Flip-Flop to Output Ddr Signal to Synchronize with a Second Clock Signal
Patent: 8,069,363 →
Application: 12/543,839 →
Publication: US 2010/0033216
Method and System for Packet Processing
Patent: 8,639,912 →
Application: 12/619,355 →
Publication: US 2010/0064116
Initialization Circuit for Delay Locked Loop
Patent: 8,218,707 →
Application: 12/639,531 →
Publication: US 2010/0109722
Timing Vernier Using a Delay Locked Loop
Patent: 7,863,954 →
Application: 12/687,541 →
Publication: US 2010/0117698
Block Programmable Priority Encoder in a Cam
Patent: 43,552 →
Application: 12/709,198 →
Charge Pump for Pll/Dll
Patent: 7,893,737 →
Application: 12/714,670 →
Publication: US 2010/0213994
Double Data Rate Output Circuit and Method
Patent: 8,296,598 →
Application: 13/113,550 →
Publication: US 2011/0228626
Wide Frequency Range Delay Locked Loop
Patent: 8,213,561 →
Application: 13/186,104 →
Publication: US 2011/0291721
Trunking in a Matrix
Patent: 8,718,056 →
Application: 13/437,177 →
Publication: US 2012/0243411
Wide Frequency Range Delay Locked Loop
Patent: 8,411,812 →
Application: 13/523,406 →
Publication: US 2013/0003483
Initialization Circuit for Delay Locked Loop
Patent: 8,503,598 →
Application: 13/532,980 →
Publication: US 2012/0306548
Double Data Rate Output Circuit
Patent: 8,533,522 →
Application: 13/624,487 →
Publication: US 2013/0024717
Congestion Management in a Network
Patent: 8,855,121 →
Application: 13/795,070 →
Publication: US 2013/0208596
Wide Frequency Range Delay Locked Loop
Patent: 8,599,984 →
Application: 13/850,500 →
Publication: US 2013/0271192
Method and System for Packet Processing
Patent: 9,325,811 →
Application: 14/148,895 →
Publication: US 2014/0122582
Wide Frequency Range Delay Locked Loop
Application: 15/479,691 →
Publication: US 2017/0272085
Related Assignments (14)
Other recorded transfers of the patents in this record — the chain of ownership.
Change of Address of Assignee Apr 15, 2009
From: MOSAID TECHNOLOGIES INCORPORATED
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 022542/0876 →
U.S. Intellectual Property Security Agreement (for Non-U.S. Grantors) - Short Form Jan 10, 2012
From: 658276 N.B. LTD.; 658868 N.B. INC.; MOSAID TECHNOLOGIES INCORPORATED
To: ROYAL BANK OF CANADA
Reel/Frame 027512/0196 →
Change of Name Mar 13, 2014
From: MOSAID TECHNOLOGIES INCORPORATED
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 032439/0638 →
Release of Security Interest Aug 7, 2014
From: ROYAL BANK OF CANADA
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.; CONVERSANT IP N.B. 868 INC.; CONVERSANT IP N.B. 276 INC.
Reel/Frame 033484/0344 →
Change of Address Sep 3, 2014
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 033678/0096 →
U.S. Patent Security Agreement (for Non-U.S. Grantors) Sep 9, 2014
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS INC., AS LENDER; ROYAL BANK OF CANADA, AS LENDER
Reel/Frame 033706/0367 →
Amended and Restated U.S. Patent Security Agreement (for Non-U.S. Grantors) Aug 22, 2018
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS, INC.
Reel/Frame 046900/0136 →
Release of U.S. Patent Agreement (for Non-U.S. Grantors) Oct 12, 2018
From: ROYAL BANK OF CANADA, AS LENDER
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 047645/0424 →
Change of Name Jun 16, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 056602/0253 →
Change of Name Sep 9, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 057449/0393 →
Change of Name Sep 9, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 057449/0162 →
Corrective Assignment to Correct the Conveying Party's Name Previously Recorded at Reel: 057449 Frame: 0393. Assignor(S) Hereby Confirms the Change of Name. Aug 30, 2023
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 064761/0404 →
Corrective Assignment to Correct the Conveying Party's Name Previously Recorded at Reel: 056602 Frame: 0253. Assignor(S) Hereby Confirms the Change of Name. Aug 30, 2023
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 064783/0267 →
Corrective Assignment to Correct the Conveying Party's Name Previously Recorded at Reel: 057449 Frame: 0162. Assignor(S) Hereby Confirms the Change of Name. Aug 30, 2023
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 064782/0950 →