IP Library › Assignment 035102/0702
Patent Assignment
Reel/Frame 035102/0702

Assignment of Assignor's Interest

Recorded: 2015-02-26 Received: 2015-02-26 Pages: 29
Assignor
Assignee
NOVACHIPS CANADA INC.
303 TERRY FOX DRIVE, SUITE 106, OTTAWA, CAX, K2K 3J1, CANADA
Covered Properties (70)
Memory Controller with Flexible Data Alignment to Clock
Application: 14/486,484 →
Method and Apparatus for Testing Surface Mounted Devices
Application: 14/478,824 →
Packet Data Id Generation for Serially Interconnected Devices
Application: 14/185,401 →
Ring-Of-Clusters Network Topologies
Application: 14/057,102 →
Memory System Having a Plurality of Serially Connected Devices
Application: 14/045,857 →
Simultaneous Read and Write Data Transfer
Application: 13/962,062 →
Configurable Module and Memory Subsystem
Application: 13/957,713 →
System Including a Plurality of Encapsulated Semiconductor Chips
Application: 13/917,728 →
High Speed Interface for Daisy-Chained Devices
Application: 13/914,126 →
Ring Topology Status Indication
Application: 13/903,418 →
Memory Controller with Flexible Data Alignment to Clock
Application: 13/887,937 →
Flash Memory Controller Having Dual Mode Pin-Out
Application: 13/835,968 →
Single-Strobe Operation of Memory Devices
Application: 13/836,702 →
Flash Memory Controller Having Multi Mode Pin-Out
Application: 13/836,113 →
Operational Mode Control in Serial-Connected Memory Based on Identifier
Application: 13/774,477 →
Apparatus and Method for Producing Device Identifiers for Serially Interconnected Devices of Mixed Type
Application: 13/671,248 →
Flash Memory Module and Memory Subsystem
Application: 13/665,181 →
Robotic Pre-Heat and Inter-Pass Welding
Application: 13/652,204 →
Power Saving Methods for Use in a System of Serially Connected Semiconductor Devices
Application: 13/425,801 →
Data Flow Control in Multiple Independent Port
Application: 13/418,478 →
Independent Write and Read Control in Serially-Connected Devices
Application: 13/401,087 →
Reduced Pin Count Interface
Application: 13/364,685 →
Apparatus and Method for Identifying Device Types of Series-Connected Devices of Mixed Type
Application: 13/168,157 →
Method and Apparatus for Concurrently Reading a Plurality of Memory Devices Using a Single Buffer
Application: 13/102,310 →
System of Interconnected Nonvolatile Memories Having Automatic Status Packet
Application: 13/048,154 →
Data Channel Test Apparatus and Method Thereof
Application: 13/033,294 →
Circuit and Method for Testing Multi-Device Systems
Application: 13/030,785 →
Status Indication in a System Having a Plurality of Memory Devices
Application: 13/023,838 →
High-Speed Interface for Daisy-Chained Devices
Application: 13/012,754 →
Single-Strobe Operation of Memory Devices
Application: 12/984,987 →
Methods and Apparatus for Clock Signal Synchronization in a Configuration of Series-Connected Semiconductor Devices
Application: 12/948,186 →
Methods and Systems for Failure Isolation and Data Recovery in a Configuration of Series-Connected Semiconductor Devices
Application: 12/945,280 →
Apparatus and Method for Producing Identifiers Regardless of Mixed Device Type in a Serial Interconnection
Application: 12/892,215 →
Apparatus and Method for Capturing Serial Input Data
Application: 12/879,543 →
Data Flow Control in Multiple Independent Port
Application: 12/851,884 →
Memory System Having a Plurality of Serially Connected Devices
Application: 12/782,911 →
Configurable Module and Memory Subsystem
Application: 12/770,376 →
Circuit and Method for Testing Multi-Device Systems
Application: 12/698,585 →
Semiconductor Device with Main Memory Unit and Auxiliary Memory Unit Requiring Preset Operation
Application: 12/640,388 →
Semiconductor Memory with Multiple Wordline Selection
Application: 12/564,492 →
Simultaneous Read and Write Data Transfer
Application: 12/504,156 →
Error Detection Method and a System Including One or More Memory Devices
Application: 12/418,892 →
Data Mirroring in Serial-Connected Memory System
Application: 12/399,315 →
Circuit and Method for Testing Multi-Device Systems
Application: 12/391,810 →
System Including a Plurality of Encapsulated Semiconductor Chips
Application: 12/367,056 →
Device and Method for Transferring Data to a Non-Volatile Memory Device
Application: 12/337,841 →
Memory Controller with Flexible Data Alignment to Clock
Application: 12/325,074 →
Selective Broadcasting of Data in Series Connected Devices
Application: 12/254,315 →
Serial-Connected Memory System with Output Delay Adjustment
Application: 12/241,832 →
Serial-Connected Memory System with Duty Cycle Correction
Application: 12/241,960 →
Mass Data Storage System with Non-Volatile Memory Modules
Application: 12/212,902 →
Mixed Data Rates in Memory Devices and Systems
Application: 12/169,115 →
Clock Reproducing and Timing Method in a System Having a Plurality of Devices
Application: 12/168,091 →
Semiconductor Memory Device Suitable for Interconnection in a Ring Topology
Application: 12/141,384 →
Data Flow Control in Multiple Independent Port
Application: 12/034,686 →
Data Channel Test Apparatus and Method Thereof
Application: 12/028,335 →
Apparatus and Method for Identifying Device Types of Series-Connected Devices of Mixed Type
Application: 12/025,177 →
Ring-Of-Clusters Network Topologies
Application: 12/013,148 →
Methods and Apparatus for Clock Signal Synchronization in a Configuration of Series-Connected Semiconductor Devices
Application: 11/959,996 →
Methods and Systems for Failure Isolation and Data Recovery in a Configuration of Series-Connected Semiconductor Devices
Application: 11/941,131 →
Single-Strobe Operation of Memory Devices
Application: 11/873,475 →
Daisy-chain memory configuration and usage
Application: 11/897,105 →
Reduced Pin Count Interface
Application: 11/843,024 →
Apparatus and Method for Producing Device Identifiers for Serially Interconnected Devices of Mixed Type
Application: 11/692,452 →
Apparatus and Method for Producing Identifiers Regardless of Mixed Device Type in a Serial Interconnection
Application: 11/692,446 →
Apparatus and Method for Identifying Device Type of Serially Interconnected Devices
Application: 11/692,326 →
Apparatus and Method for Capturing Serial Input Data
Application: 11/567,551 →
Circuit and Method for Testing Multi-Device Systems
Application: 11/565,327 →
Packet Based Id Generation for Serially Interconnected Devices
Application: 11/529,293 →
Pulse Counter with Clock Edge Recovery
Application: 11/495,609 →