IP Library Assignment 054444/0018
Patent Assignment
Reel/Frame 054444/0018

Release of Security Interest

Recorded: 2020-11-06 Pages: 74
Assignor
CPPIB CREDIT INVESTMENTS INC.
Executed: 2020-10-28
Assignee
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
515 LEGGET DRIVE, SUITE 704, OTTAWA, K2K 3G4, CANADA
Covered Properties (51)
System and Method of Operating Memory Devices of Mixed Type
Patent: 7,925,854 →
Application: 11/771,241 →
Publication: US 2008/0140916
Storage of Data in Memory via Packet Strobing
Patent: 7,688,652 →
Application: 11/779,587 →
Publication: US 2009/0021992
Partial Block Erase Architecture for Flash Memory
Patent: 7,804,718 →
Application: 11/779,685 →
Publication: US 2008/0219053
Memory System Having Incorrupted Strobe Signals
Patent: 7,652,932 →
Application: 11/780,231 →
Publication: US 2009/0021998
Dynamic Random Access Memory and Boosted Voltage Producer Therefor
Patent: 8,072,256 →
Application: 11/855,496 →
Publication: US 2009/0073795
Non-Volatile Semiconductor Memory Having Multiple External Power Supplies
Patent: 7,639,540 →
Application: 11/955,754 →
Publication: US 2008/0198657
Data processing with time-based memory access
Patent: 8,914,612 →
Application: 11/978,529 →
Publication: US 2009/0113159
Clock Mode Determination in a Memory System
Patent: 7,885,140 →
Application: 12/032,249 →
Publication: US 2009/0039927
Nonvolatile Memory Having Non-Power of Two Memory Capacity
Patent: 7,813,212 →
Application: 12/042,551 →
Publication: US 2009/0187798
Pre-Charge Voltage Generation and Power Saving Modes
Patent: 7,903,477 →
Application: 12/181,115 →
Publication: US 2009/0219767
Apparatus and Method for Modeling Coarse Stepsize Delay Element and Delay Locked Loop Using Same
Patent: 7,952,404 →
Application: 12/192,215 →
Publication: US 2010/0039148
Hierarchical Common Source Line Structure in Nand Flash Memory
Patent: 7,978,518 →
Application: 12/337,038 →
Publication: US 2009/0161437
Multi-Level Cell Access Buffer with Dual Function
Patent: 7,965,550 →
Application: 12/499,577 →
Publication: US 2009/0273973
Non-Volatile Semiconductor Memory Having Multiple External Power Supplies
Patent: 8,194,456 →
Application: 12/617,459 →
Publication: US 2010/0110794
Memory System Having Incorrupted Strobe Signals
Patent: 7,889,580 →
Application: 12/651,707 →
Publication: US 2010/0097869
Memory with Data Control
Patent: 8,144,528 →
Application: 12/699,627 →
Publication: US 2010/0202224
Multiple Bit Per Cell Non Volatile Memory Apparatus and System Having Polarity Control and Method of Programming Same
Patent: 7,952,923 →
Application: 12/782,047 →
Publication: US 2010/0226174
Partial Block Erase Architecture for Flash Memory
Patent: 8,842,472 →
Application: 12/785,099 →
Publication: US 2010/0226183
Nonvolatile Semiconductor Memory Device
Patent: 8,533,405 →
Application: 12/812,500 →
Publication: US 2010/0306482
Apparatus and Method of Page Program Operation for Memory Devices with Mirror Back-Up of Data
Patent: 7,908,429 →
Application: 12/832,121 →
Publication: US 2010/0275056
Method for Stacking Serially-Connected Integrated Circuits and Multi-Chip Device Made from Same
Patent: 7,923,370 →
Application: 12/852,082 →
Publication: US 2010/0297812
Clock Mode Determination in a Memory System
Patent: 8,432,767 →
Application: 13/006,005 →
Publication: US 2011/0110165
Pre-Charge Voltage Generation and Power Saving Modes
Patent: 8,279,685 →
Application: 13/019,100 →
Publication: US 2011/0122719
Method for Stacking Serially-Connected Integrated Circuits and Multi-Chip Device Made from Same
Patent: 8,383,514 →
Application: 13/046,197 →
Publication: US 2011/0163423
Non-Volatile Semiconductor Memory Having Multiple External Power Supplies
Patent: 8,300,471 →
Application: 13/096,874 →
Publication: US 2011/0199820
Multi-Level Cell Access Buffer with Dual Function
Patent: 8,274,825 →
Application: 13/114,523 →
Publication: US 2011/0222350
Multiple-Bit Per Cell (Mbc) Non-Volatile Memory Apparatus and System Having Polarity Control and Method of Programming Same
Patent: 8,724,382 →
Application: 13/117,715 →
Publication: US 2011/0317487
Apparatus and Method for Modeling Coarse Stepsize Delay Element and Delay Locked Loop Using Same
Patent: 8,125,257 →
Application: 13/117,934 →
Publication: US 2011/0316598
Hierarchical Common Source Line Structure in Nand Flash Memory
Patent: 8,208,306 →
Application: 13/154,891 →
Publication: US 2011/0235424
Apparatus and Method of Page Program Operation for Memory Devices with Mirror Back-Up of Data
Patent: 8,886,871 →
Application: 13/250,301 →
Publication: US 2012/0023286
Dynamic Random Access Memory and Boosted Voltage Producer Therefor
Patent: 8,526,260 →
Application: 13/305,064 →
Publication: US 2012/0069693
Hierarchical Common Source Line Structure in Nand Flash Memory
Patent: 8,675,410 →
Application: 13/481,888 →
Publication: US 2012/0236647
Multi-Level Cell Access Buffer with Dual Function
Patent: 8,565,026 →
Application: 13/595,466 →
Publication: US 2012/0320674
Pre-Charge Voltage Generation and Power Saving Modes
Patent: 8,699,288 →
Application: 13/599,836 →
Publication: US 2012/0320695
Non-Volatile Semiconductor Memory Having Multiple External Power Supplies
Patent: 8,619,473 →
Application: 13/649,403 →
Publication: US 2013/0033941
Scalable Memory System
Patent: 8,671,252 →
Application: 13/776,757 →
Publication: US 2013/0170298
Clock Mode Determination in a Memory System
Patent: 8,644,108 →
Application: 13/871,487 →
Publication: US 2013/0235659
Non-Volatile Semiconductor Memory Having Multiple External Power Supplies
Patent: 9,245,640 →
Application: 14/107,735 →
Publication: US 2014/0104954
Clock Mode Determination in a Memory System
Patent: 8,854,915 →
Application: 14/158,215 →
Publication: US 2014/0133243
Pre-Charge Voltage Generation and Power Saving Modes
Patent: 9,196,319 →
Application: 14/216,024 →
Publication: US 2014/0198587
Dynamic Random Access Memory and Boosted Voltage Producer Therefor
Patent: 9,123,402 →
Application: 14/324,265 →
Publication: US 2014/0321226
Clock Mode Determination in a Memory System
Patent: 9,042,199 →
Application: 14/491,440 →
Publication: US 2015/0009761
Clock Mode Determination in a Memory System
Patent: 9,384,847 →
Application: 14/720,317 →
Publication: US 2015/0255167
Dynamic Random Access Memory and Boosted Voltage Producer Therefor
Application: 14/828,725 →
Publication: US 2016/0035407
Non-Volatile Semiconductor Memory Having Multiple External Power Supplies
Patent: 9,576,675 →
Application: 14/969,351 →
Publication: US 2016/0099072
Clock Mode Determination in a Memory System
Patent: 9,552,889 →
Application: 15/183,162 →
Publication: US 2016/0293265
Clock Mode Determination in a Memory System
Patent: 9,740,407 →
Application: 15/378,650 →
Publication: US 2017/0160935
Non-Volatile Semiconductor Memory Having Multiple External Power Supplies
Patent: 9,928,918 →
Application: 15/401,858 →
Publication: US 2017/0117052
Non-Volatile Semiconductor Memory Having Multiple External Power Supplies
Application: 15/597,603 →
Publication: US 2017/0309342
Clock Mode Determination in a Memory System
Patent: 9,971,518 →
Application: 15/655,336 →
Publication: US 2017/0322730
Clock Mode Determination in a Memory System
Application: 15/957,120 →
Publication: US 2018/0314424
Related Assignments (18)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 17, 2008
From: GILLINGHAM, PETER, MR.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 021255/0135 →
Assignment of Assignor's Interest Jan 12, 2009
From: GILLINGHAM, PETER B.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 022087/0337 →
Change of Address of Assignee Apr 15, 2009
From: MOSAID TECHNOLOGIES INCORPORATED
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 022542/0876 →
General Conditions of Employment Jan 24, 2011
From: ALLAN, GRAHAM
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 025681/0542 →
U.S. Intellectual Property Security Agreement (for Non-U.S. Grantors) - Short Form Jan 10, 2012
From: 658276 N.B. LTD.; 658868 N.B. INC.; MOSAID TECHNOLOGIES INCORPORATED
To: ROYAL BANK OF CANADA
Reel/Frame 027512/0196 →
Change of Name Mar 13, 2014
From: MOSAID TECHNOLOGIES INCORPORATED
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 032439/0638 →
Release of Security Interest Aug 7, 2014
From: ROYAL BANK OF CANADA
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.; CONVERSANT IP N.B. 868 INC.; CONVERSANT IP N.B. 276 INC.
Reel/Frame 033484/0344 →
Change of Address Sep 3, 2014
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 033678/0096 →
U.S. Patent Security Agreement (for Non-U.S. Grantors) Sep 9, 2014
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS INC., AS LENDER; ROYAL BANK OF CANADA, AS LENDER
Reel/Frame 033706/0367 →
Amended and Restated U.S. Patent Security Agreement (for Non-U.S. Grantors) Aug 22, 2018
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS, INC.
Reel/Frame 046900/0136 →
Release of U.S. Patent Agreement (for Non-U.S. Grantors) Oct 12, 2018
From: ROYAL BANK OF CANADA, AS LENDER
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 047645/0424 →
Change of Name Jun 16, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 056610/0258 →
Change of Name Jun 16, 2021
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 056603/0591 →
Change of Name Jun 16, 2021
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 056603/0094 →
Change of Name Sep 9, 2021
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 057709/0849 →
Change of Name Oct 19, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 057857/0200 →
Corrective Assignment to Correct the Conveying Party's Name Previously Recorded at Reel: 057857 Frame: 0200. Assignor(S) Hereby Confirms the Change of Name. Aug 28, 2023
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 064741/0347 →
Corrective Assignment to Correct the Conveying Party's Name Previously Recorded at Reel: 056610 Frame: 0258. Assignor(S) Hereby Confirms the Change of Name. Aug 30, 2023
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 064783/0161 →