IP Library › Assignment 012252/0413
Patent Assignment
Reel/Frame 012252/0413

Release of Security Interest

Recorded: 2001-11-05 Pages: 38
Assignor
CREDIT SUISSE FIRST BOSTON
Executed: 2001-10-18
Assignees
CONEXANT SYSTEMS, INC.
4311 JAMBOREE ROAD, NEWPORT BEACH, CALIFORNIA, 92660
BROOKTREE CORPORATION
4311 JAMBOREE ROAD, NEWPORT BEACH, CALIFORNIA, 92660
BROOKTREE WORLDWIDE SALES CORPORATION
4311 JAMBOREE ROAD, NEWPORT BEACH, CALIFORNIA, 92660
CONEXANT SYSTEMS WORLDWIDE, INC.
4311 JAMBOREE ROAD, NEWPORT BEACH, CALIFORNIA, 92660
Covered Properties (459)
Electronic Card Game
Patent: 4,339,134 →
Application: 05/813,199 →
Epitaxial Composite and Method of Making
Patent: 4,404,265 →
Application: 05/894,368 →
Charge Coupled Digital-to-Analog Converter
Patent: 4,321,584 →
Application: 06/048,960 →
Method of Making a Fully Integrated Monolithic Optical Receiver
Patent: 4,314,858 →
Application: 06/096,872 →
Non-Linear Signal Processor
Patent: 4,315,319 →
Application: 06/117,502 →
Embedded Absorber X-Ray Mask and Method for Making Same
Patent: 4,536,882 →
Application: 06/119,331 →
Sense Amplifier and Method for Small Bit Line Swing with Short Propagation Delay for High Speed Mos Memories
Patent: 4,355,247 →
Application: 06/120,239 →
Rom-Based Parallel Digital Arithmetic Device
Patent: 4,313,174 →
Application: 06/130,653 →
Method and Apparatus for an Optical Sensor Utilizing Semiconductor Filters
Patent: 4,401,694 →
Application: 06/137,069 →
Method and Apparatus for an Optical Sensor Utilizing Semiconductor Filters
Patent: 4,355,910 →
Application: 06/138,059 →
Rom-Based Complex Multiplier Useful for Fft Butterfly Arithmetic Unit
Patent: 4,344,151 →
Application: 06/142,594 →
Semiconductor Magneto-Transistor Device
Patent: 4,369,406 →
Application: 06/146,928 →
Self Scanned Optical Fourier Transform Arrangement
Patent: 4,355,869 →
Application: 06/154,246 →
Optical Signal Processing Device
Patent: 4,344,675 →
Application: 06/154,358 →
Integrated Circuit Chip Transmission Line
Patent: 4,379,307 →
Application: 06/160,031 →
Surface Acoustic Wave Device Having Buried Transducer
Patent: 4,350,916 →
Application: 06/163,533 →
Sos Island Edge Passivation Structure
Patent: 4,368,085 →
Application: 06/166,950 →
Synchronization System for Digital Data
Patent: 4,328,588 →
Application: 06/169,583 →
Reduced Power Tristate Driver Circuit
Patent: 4,363,978 →
Application: 06/174,089 →
Method of Making Cmos Devices
Patent: 4,335,504 →
Application: 06/189,884 →
Distributed Optical Parametric Amplifier
Patent: 4,361,814 →
Application: 06/191,545 →
Copper Embedded Ferrite Coil Arrangement for Supplying Uniform Rotating Field in Full Frequency Range for Testing Magnetic Bubble Devices
Patent: 4,414,507 →
Application: 06/191,546 →
Controlled Oscillator Having Random Variable Frequency
Patent: 4,646,032 →
Application: 06/191,648 →
Digital Frequency Synthesizer with Random Jittering for Reducing Discrete Spectral Spurs
Patent: 4,410,954 →
Application: 06/195,274 →
Repeatable Method for Sloping Walls of Thin Film Material
Patent: 4,326,936 →
Application: 06/195,957 →
Blocked Impurity Band Detectors
Patent: 4,568,960 →
Application: 06/199,881 →
Ion Etching Process with Minimized Redeposition
Patent: 4,337,132 →
Application: 06/206,929 →
Voltage-Temperature Insensitive on-Chip Reference Voltage Source Compatible with Vlsi Manufacturing Techniques
Patent: 4,347,476 →
Application: 06/212,783 →
Semi-Open Liquid Phase Epitaxial Growth System
Patent: 4,315,477 →
Application: 06/214,548 →
Schottky Diode - Diode Field Effect Transistor Logic
Patent: 4,405,870 →
Application: 06/214,924 →
Rom with Redundant Rom Cells Employing a Highly Resistive Polysilicon Film for Programming the Cells
Patent: 4,404,581 →
Application: 06/216,578 →
E Beam Source for Deposition of Thin Film Alloys
Patent: 4,368,689 →
Application: 06/220,397 →
Inductive Heating Arrangement for Evaporating Thin Film Alloy Onto a Substrate
Patent: 4,406,252 →
Application: 06/220,398 →
Making Sub-Micron Dimensioned Method of Npn Lateral Transistor
Patent: 4,415,371 →
Application: 06/220,400 →
Multiplexer for Single-Octave Data Processor
Patent: 4,389,538 →
Application: 06/224,401 →
Planar Circuit Fabrication by Plating and Liftoff
Patent: 4,339,305 →
Application: 06/231,712 →
Process for and Structure of High Density Vlsi Circuits, Having Self-Aligned Gates and Contacts for Fet Devices and Conducting Lines
Patent: 4,455,737 →
Application: 06/242,442 →
High Rate Resist Polymerization Method
Patent: 4,357,364 →
Application: 06/257,822 →
Small Area High Value Resistor with Greatly Reduced Parasitic Capacitance
Patent: 4,506,283 →
Application: 06/261,435 →
Voltage Regulator Circuit
Patent: 4,390,833 →
Application: 06/266,239 →
Compliant Glass for Solid State Devices
Patent: 4,378,410 →
Application: 06/274,846 →
Method of Making Extremely Small Area Pnp Lateral Transistor by Angled Implant of Deep Trenches Followed by Refilling the Same with Dietectrics
Patent: 4,466,178 →
Application: 06/277,380 →
Punch Through Voltage Regulator Diodes and Methods of Manufacture
Patent: 4,466,180 →
Application: 06/277,464 →
Silicon Vacuum Electron Devices
Patent: 4,683,399 →
Application: 06/278,528 →
Method for Deposition of Thin Film Alloys Utilizing Electron Beam Vaporization
Patent: 4,400,407 →
Application: 06/283,580 →
Frequency Control with a Phased-Locked Loop
Patent: 4,484,154 →
Application: 06/299,453 →
Method of Fabrication of Dielectrically Isolated Cmos Devices
Patent: 4,416,050 →
Application: 06/305,247 →
Electrochromic Nonvolatile Memory Device
Patent: 4,498,156 →
Application: 06/305,248 →
Microelectronic Shadow Masking Process for Reducing Punchthrough
Patent: 4,394,182 →
Application: 06/311,206 →
Fet Power Supply for Mos Memories
Patent: 4,399,373 →
Application: 06/315,790 →
Ac Coupled Chopper Stabilized Differential Comparator
Patent: 4,450,368 →
Application: 06/332,634 →
Electrical Switch
Patent: 4,445,183 →
Application: 06/334,002 →
Mos Fixed Delay Circuit
Patent: 4,430,587 →
Application: 06/339,030 →
Computing Device
Patent: 4,507,741 →
Application: 06/346,829 →
Adaptive Spectrum Shaping Filter
Patent: 4,524,424 →
Application: 06/349,871 →
Shielded Amplifier
Patent: 4,454,481 →
Application: 06/354,840 →
Ion Etching Process with Minimized Redeposition
Patent: 4,396,479 →
Application: 06/355,445 →
Flexible Circuit Board Interconnect Having Low Thermal Conductivity
Patent: 4,509,095 →
Application: 06/356,069 →
Light Emitting Transistor Array
Patent: 4,473,834 →
Application: 06/369,858 →
Cvd Process for Producing Monocrystalline Silicon-on-Cubic Zirconia and Article Produced Thereby
Patent: 4,447,497 →
Application: 06/373,929 →
Squaring Circuit Bypass
Patent: 4,464,586 →
Application: 06/376,480 →
Process for in-Situ Formation of Niobium-Insulator-Niobium Josephson Tunnel Junction Devices
Patent: 4,432,134 →
Application: 06/376,483 →
Clocked Tri-State Driver Circuit
Patent: 4,504,745 →
Application: 06/388,044 →
Method for Producing Pnp Type Lateral Transistor Separated Substrate by O.D.E.for Minimal Interference Therefrom
Patent: 4,522,682 →
Application: 06/390,496 →
High Voltage Level Detector and Method
Patent: 4,496,855 →
Application: 06/392,106 →
Mehtod of Forming Integrated Circuit Chip Transmisson Line
Patent: 4,389,429 →
Application: 06/393,149 →
Mos/Lsi Time Delay Circuit
Patent: 4,503,345 →
Application: 06/394,741 →
Process for and Structure of High Density Vlsi Circuits, Having Self- Aligned Gates and Contacts for Fet Devices and Conducting Lines
Patent: 4,477,962 →
Application: 06/397,050 →
Process for and Structure of High Density Vlsi Circuits, Having Self- Aligned Gates and Contacts for Pet Devices and Conducting Lines
Patent: 4,506,437 →
Application: 06/397,052 →
High Rate Resist Polymerization Apparatus
Patent: 4,459,937 →
Application: 06/397,646 →
Very High Density Cells Comprising a Rom and Method of Manufacturing Same
Patent: 4,406,049 →
Application: 06/397,647 →
Tracking Rom Drive and Sense Circuit
Patent: 4,482,824 →
Application: 06/397,648 →
Digital Phase Shifting Apparatus Which Compensates for Change of Frequency of an Input Signal to Be Phase Shifted
Patent: 4,495,473 →
Application: 06/399,678 →
Microcomputer Retriggerable Interval Counter
Patent: 4,538,235 →
Application: 06/409,485 →
Lateral Npn Transistor and Method
Patent: 4,419,150 →
Application: 06/418,862 →
Rom with Redundant Rom Cells Employing a Highly Resistive Polysilicon Film for Programming the Cells
Patent: 4,419,808 →
Application: 06/421,757 →
Electro-Optically Tuned Rejection Filter
Patent: 4,508,964 →
Application: 06/426,348 →
Low-Power Address Decoder
Patent: 4,488,266 →
Application: 06/426,469 →
Metal-Semiconductor Field-Effect Transistor with a Partial P-Type Drain
Patent: 4,633,282 →
Application: 06/432,463 →
Method of Fabrication of a Birefringent Electroagnetic Transmission Line
Patent: 4,455,267 →
Application: 06/440,917 →
Parameter-Setting Approach to Obtain High Performance Ctd Transversal Filters from Devices with Significant Cti and Fpn
Patent: 4,539,536 →
Application: 06/441,195 →
Ccd Demodulator Circuit
Patent: 4,484,143 →
Application: 06/448,570 →
Npn Type Lateral Transistor Separated from Substrate by O. D. E. for Minimal Interference Therefrom and Method for Producing Same
Patent: 4,485,551 →
Application: 06/450,308 →
Npn Type Lateral Transistor with Minimal Substrate Operation Interference and Method for Producing Same
Patent: 4,437,226 →
Application: 06/450,309 →
Lateral Transistor Separated from Substrate by Intersecting Slots Filled with Substrate Oxide or Minimal Interference Therefrom and Method for Producing Same
Patent: 4,435,899 →
Application: 06/450,310 →
Reactive Ion Etching of Moltybdenum Silicide and N Polysilicon
Patent: 4,444,617 →
Application: 06/456,183 →
De-Glitch Circuitry for Video Game Memories
Patent: 4,599,525 →
Application: 06/463,093 →
Dimension Monitoring Technique for Semiconductor Fabrication
Patent: 4,639,142 →
Application: 06/484,666 →
Signal Processor for Compensating Detector Non-Uniformities
Patent: 4,573,133 →
Application: 06/486,467 →
Mask Alignment Measurement Structure for Semiconductor Fabrication
Patent: 4,571,538 →
Application: 06/488,225 →
Mos Voltage Comparator and Method
Patent: 4,549,100 →
Application: 06/492,102 →
Low Power, High Speed Random Access Memory Circuit
Patent: 4,575,821 →
Application: 06/493,093 →
Selective Access Array Integrated Circuit
Patent: 4,547,792 →
Application: 06/495,361 →
Test Socket for a Leadless Chip Carrier
Patent: 4,554,505 →
Application: 06/503,002 →
Multilayer Modulation Doped Heterostructure Charge Coupled Device
Patent: 4,550,331 →
Application: 06/518,786 →
Strontium Ferrite Borate
Patent: 4,499,061 →
Application: 06/519,796 →
Ceramic Strontium Ferrite Borate
Patent: 4,493,819 →
Application: 06/519,797 →
Method for Making a Reliable Ohmic Contact Between Two Layers of Integrated Circuit Metallizations
Patent: 4,507,852 →
Application: 06/531,529 →
Impurity Band Conduction Semiconductor Devices
Patent: 4,586,074 →
Application: 06/532,332 →
Local Area Network Interframe Delay Controller
Patent: 4,593,281 →
Application: 06/541,816 →
Local Area Network Interface Controller
Patent: 4,590,467 →
Application: 06/541,817 →
Small Area High Value Resistor with Greatly Reduced Parasitic Capacitance
Patent: 4,497,685 →
Application: 06/544,914 →
Agc Update Apparatus and Method of Using Same
Patent: 4,623,934 →
Application: 06/552,512 →
Pnp Type Lateral Transistor with Minimal Substrate Operation Interference and Method for Producing Same
Patent: 4,580,331 →
Application: 06/558,072 →
Lateral Transistor Separated from Substrate by Intersecting Slots Filled with Substrate Oxide for Minimal Interference Therefrom and Method for Producing Same
Patent: 4,584,762 →
Application: 06/558,073 →
Oscillator Signal Detect Circuit
Patent: 4,583,013 →
Application: 06/579,617 →
Apparatus for Converting Data Between Analog and Digital Values
Patent: 4,658,240 →
Application: 06/607,736 →
Two-Level Transistor Structures and Method Utilizing Minimal Area Therefor
Patent: 4,593,453 →
Application: 06/621,773 →
Controlled Oscillator Having Random Variable Frequency
Patent: 4,684,903 →
Application: 06/623,291 →
Method of Eliminating P-Type Electrical Activity and Increasing Channel Mobility of Si-Implanted and Recrystallized Sos Films
Patent: 4,588,447 →
Application: 06/624,076 →
Process for High Density Vlsi Circuits, Having Self-Aligned Gates and Contacts for Fet Devices and Conducting Lines
Patent: 4,587,711 →
Application: 06/638,153 →
Complex Multiplier for Binary Two's Complement Numbers
Patent: 4,680,727 →
Application: 06/653,179 →
Frequency Synthesizer
Patent: 4,835,721 →
Application: 06/655,662 →
Precision Integrating Analog-to-Digital Converter System
Patent: 4,598,270 →
Application: 06/657,647 →
Frequency Multiplexed Telephone System
Patent: 4,706,244 →
Application: 06/692,597 →
Process for Producing Amorphous and Crystalline Silicon Nitride
Patent: 4,552,740 →
Application: 06/704,979 →
Vacuum Wand Holder
Patent: 4,597,551 →
Application: 06/709,640 →
Flexible Rejection Filter (U)
Patent: 5,396,368 →
Application: 06/718,966 →
Intermediary Layers for Epitaxial Hexagonal Ferrite Films
Patent: 4,624,901 →
Application: 06/720,202 →
Process for Producing Npn Type Laternal Transistors
Patent: 4,611,387 →
Application: 06/721,004 →
Apparatus for Converting Data Between Analog and Digital Values
Patent: 4,857,929 →
Application: 06/724,829 →
Small Size, High Speed Gaas Data Latch
Patent: 4,707,808 →
Application: 06/727,958 →
Gaas Driver Circuit
Patent: 5,293,085 →
Application: 06/728,546 →
Isolated Low Power Thyristor Gate Drive Circuit
Patent: 4,631,472 →
Application: 06/740,465 →
Non-Volatile Ram Cell with Charge Pumps
Patent: 4,685,085 →
Application: 06/745,746 →
Gapless Gate Charge Coupled Device
Patent: 4,675,714 →
Application: 06/750,657 →
Apparatus for Converting Between Digital and Analog Values
Patent: 4,665,380 →
Application: 06/755,170 →
Uncompensated and Compensated Gallium Arsenide Input Receivers
Patent: 4,703,205 →
Application: 06/759,193 →
Hybrid Charge-Transfer-Device Filter Structure
Patent: 4,809,209 →
Application: 06/769,059 →
Digital Peak Detector and Method of Peak Detection
Patent: 4,654,587 →
Application: 06/770,947 →
Synthetic Quadrature Generating Apparatus
Patent: 4,787,058 →
Application: 06/776,181 →
System for Reading and Writing Information
Patent: 4,905,189 →
Application: 06/810,911 →
Method for Producing a Field Effect Transistor
Patent: 4,670,090 →
Application: 06/821,664 →
Non-Volatile Ram Cell with Dual High Voltage Precharge
Patent: 4,706,220 →
Application: 06/829,253 →
Production of Oxy-Metallo-Organic Polymer
Patent: 4,698,417 →
Application: 06/831,955 →
Telephone Signal Multiplexing System
Patent: 4,739,205 →
Application: 06/832,613 →
Diffused Field Cmos-Bulk Process
Patent: 4,749,662 →
Application: 06/837,560 →
Nonlinear Statistical Signal Processor
Patent: 4,774,682 →
Application: 06/845,227 →
Fast High-Resolution Analog-to-Digital Converter
Patent: 4,899,153 →
Application: 06/846,545 →
Method of Adjusting Threshold Voltage Subsequent to Fabrication of Transistor
Patent: 4,701,422 →
Application: 06/848,514 →
Third Mode Torsional E-M Resonator
Patent: 5,006,824 →
Application: 06/849,093 →
Method of Making Hardened Nmos Sub-Micron Field Effect Transistors
Patent: 4,697,328 →
Application: 06/856,302 →
Method of Making Hardened Cmos Sub-Micron Field Effect Transistors
Patent: 4,694,565 →
Application: 06/856,304 →
Frequency Modulated Phase-Locked Stabilized Passive Ring Laser Gyro
Patent: 4,815,851 →
Application: 06/864,232 →
Liquid Phase Epitaxy Apparatus and Method
Patent: 4,755,364 →
Application: 06/867,974 →
Planarization Process for Double Metal Mos Using Spin-on Glass as a Sacrificial Layer
Patent: 4,676,867 →
Application: 06/871,655 →
Centroiding Algorithm for Networks Used in a/D and D/a Converters
Patent: 4,875,046 →
Application: 06/884,472 →
Universal Solid State Power Controller
Patent: 4,740,883 →
Application: 06/893,058 →
Process for Manufacturing Metal-Semiconductor Field-Effect Transistors
Patent: 4,731,339 →
Application: 06/899,574 →
Off Line Capacitor-Divider Power Supply for Solid State Power Controller
Patent: 4,665,355 →
Application: 06/907,437 →
Distributed Arithmetic Realization of Second-Order Normal-Form Digital Filter
Patent: 4,811,262 →
Application: 06/909,750 →
Dual Deposition Single Level Lift-Off Process
Patent: 4,687,541 →
Application: 06/909,804 →
Controllable Piecewise Linear Gain Circuit
Patent: 4,680,489 →
Application: 06/911,588 →
Apparatus for Converting Digital Values to Analog Values
Patent: 4,899,151 →
Application: 06/915,784 →
Solid State Dc Rate of Rise Controlled Switch
Patent: 4,705,962 →
Application: 06/918,235 →
Employing Negative Feedback Fro Decreasing the Response Time of a Cell
Patent: 4,813,023 →
Application: 06/921,530 →
Flash Analog-to-Digital Converter
Patent: 4,860,011 →
Application: 06/923,632 →
Ceramic/Organic Multilayer Interconnection Board
Patent: 4,740,414 →
Application: 06/931,324 →
Lateral Bipolar Transistor
Patent: 4,775,882 →
Application: 06/932,239 →
Isolated Controller Circuit
Patent: 4,709,315 →
Application: 06/934,516 →
Clocked Cmos Bus Precharge Circuit Having Level Sensing
Patent: 4,763,023 →
Application: 07/015,476 →
Single Sideband Signal Generator
Patent: 4,835,791 →
Application: 07/017,125 →
Dual Lift-Off Self Aligning Process for Making Heterojunction Bipolar Transistors
Patent: 4,731,340 →
Application: 07/017,957 →
Digital-To-Analog Converter
Patent: 4,812,818 →
Application: 07/018,014 →
Multiphase Cmos Toggle Flip-Flop
Patent: 4,804,864 →
Application: 07/023,179 →
Apparatus for Converting Data Between Digital and Analog Values
Patent: 4,847,621 →
Application: 07/026,539 →
Method for Depositing a Ternary Compound Having a Compositional Profile
Patent: 4,740,386 →
Application: 07/031,733 →
Lateral Transistor Separated from Substrate by Intersecting Slots Filled with Substrate Oxide for Minimal Interference Therefrom
Patent: 5,031,014 →
Application: 07/062,007 →
Pnp Type Lateral Transistor with Minimal Substrate Operation Interference
Patent: 5,025,302 →
Application: 07/062,754 →
Npn Type Lateral Transistor with Minimal Substrate Operation Interference
Patent: 5,027,184 →
Application: 07/063,541 →
Extremely Small Area Npn Lateral Transistor
Patent: 5,043,787 →
Application: 07/066,593 →
Pnp Type Lateral Transistor with Minimal Substrate Operation Interference
Patent: 5,047,828 →
Application: 07/066,663 →
Complementary Npn and Pnp Lateral Transistors Separated from Substrate by Intersecting Slots Filled with Substrate Oxide for Minimal Interference Therefrom
Patent: 5,097,316 →
Application: 07/068,383 →
Switching System for Capacitor Charging/Discharging
Patent: 4,733,153 →
Application: 07/069,317 →
Sub-Micron Devices with Method for Forming Sub-Micron Contacts
Patent: 4,947,225 →
Application: 07/073,591 →
Current Meter
Patent: 4,899,103 →
Application: 07/074,256 →
System for Compensating for Offset Voltages in Comparators
Patent: 4,841,252 →
Application: 07/081,910 →
Floating Point Unit Using Combined Multiply and Alu Functions
Patent: 4,866,652 →
Application: 07/092,023 →
Static Memory Cell Using a Heterostructure Complementary Transistor Switch
Patent: 4,807,008 →
Application: 07/095,974 →
Clock Synchronization System
Patent: 4,868,548 →
Application: 07/102,034 →
Cmos Input Circuit
Patent: 4,831,282 →
Application: 07/104,690 →
Diffused Field Cmos-Bulk Process and Cmos Transistors
Patent: 4,879,583 →
Application: 07/105,413 →
Ttl to Cmos Voltage Level Translator
Patent: 4,794,282 →
Application: 07/106,179 →
Interactive Diagnostic Methodology and Apparatus for Microelectronic Devices
Patent: 4,878,179 →
Application: 07/119,741 →
Radiation Hardened Field Oxides for Nmos and Cmos-Bulk and Process for Forming
Patent: 4,990,983 →
Application: 07/130,914 →
Nonalloyed Ohmic Contacts for N Type Gallium Arsenide
Patent: 4,833,042 →
Application: 07/148,797 →
Method and Apparatus for Performing Double Precision Vector Operations on a Coprocessor
Patent: 5,027,272 →
Application: 07/149,468 →
Liquid Phase Epitaxy Apparatus and Method
Patent: 4,828,648 →
Application: 07/157,557 →
Reference Generator
Patent: 4,814,688 →
Application: 07/163,646 →
Difar Demultiplexer Circuit
Patent: 4,879,694 →
Application: 07/164,050 →
Difar Demultiplexer Test Circuit
Patent: 4,868,792 →
Application: 07/165,968 →
Floating Point Circuit with Configurable Number of Multiplier Cycles and Variable Divide Cycle Ratio
Patent: 4,901,267 →
Application: 07/167,802 →
Self-Checking Voting Logic for Fault Tolerant Computing Applications
Patent: 4,873,685 →
Application: 07/190,311 →
Semi-Insulating Cobalt Doped Indium Phosphide Grown by Mocvd
Patent: 5,045,496 →
Application: 07/194,676 →
Speech Specific Adaptive Transform Coder
Patent: 4,991,213 →
Application: 07/199,015 →
Adaptive Transform Coder Having Minimal Bit Allocation Processing
Patent: 4,964,166 →
Application: 07/199,360 →
Short Wavelength Impurity Band Conduction Detectors
Patent: 4,896,202 →
Application: 07/209,244 →
Flash Comparator
Patent: 4,899,154 →
Application: 07/224,871 →
Apparatus for Converting Between Digital and Analog Values
Patent: 4,904,922 →
Application: 07/225,055 →
Flash Analog-to-Digital Converter with Logarithmic/Linear Thresshold Voltages
Patent: 4,928,102 →
Application: 07/231,100 →
Self-Timing Analog-to-Digital Converting System
Patent: 4,926,176 →
Application: 07/236,505 →
Radiation Hardened Field Oxides for Nmos and Cmos-Bulk and Process for Forming
Patent: 4,994,407 →
Application: 07/247,053 →
Intrinsic Impurity Band Conduction Detectors
Patent: 4,962,304 →
Application: 07/289,133 →
Digital Signal Direction Detection Circuit
Patent: 4,982,115 →
Application: 07/305,344 →
High Voltage Pulse Power Converter
Patent: 4,908,524 →
Application: 07/307,819 →
Method for Sulfide Surface Passivation
Patent: 5,366,934 →
Application: 07/310,034 →
Etched Back Edge Isolation Process for Heterojunction Bipolar Transistors
Patent: 5,028,549 →
Application: 07/335,477 →
Methods and Apparatus for Reconstructing Non-Quantized Adaptively Transformed Voice Signals
Patent: 5,042,069 →
Application: 07/339,809 →
Adaptive Transform Coder Having Long Term Predictor
Patent: 5,012,517 →
Application: 07/339,991 →
Self-Aligned Dielectric Assisted Planarization Process
Patent: 4,996,165 →
Application: 07/341,464 →
A Sinusoidal Current Sense and Scaling Circuit
Patent: 4,928,059 →
Application: 07/345,939 →
High-Speed Modified Successive Approximation Analog to Digital Converter
Patent: 5,017,920 →
Application: 07/347,703 →
Method and Apparatus for Clock and Data Recovery with High Jitter Tolerance
Patent: 5,056,118 →
Application: 07/353,137 →
Non-Linear Analog-to-Digital Converter
Patent: 4,983,973 →
Application: 07/354,864 →
Method and Apparatus for Shared Radix 4 Division and Radix 4 Square Root
Patent: 4,939,686 →
Application: 07/361,802 →
Method and Apparatus for Broadband Impedance Matching
Patent: 4,992,752 →
Application: 07/364,058 →
Memory Transformation Apparatus and Method
Patent: 5,095,525 →
Application: 07/371,167 →
Computing Element for Neural Networks
Patent: 5,319,587 →
Application: 07/390,049 →
Reverse-Engineering Resistant Encapsulant for Microelectric Device
Patent: 5,030,796 →
Application: 07/392,799 →
Substrates Containing Electrically Conducting Coatings and Method of Producing Same
Patent: 5,002,824 →
Application: 07/394,260 →
Method of Fabricating Semiconductor Devices with Sub-Micron Linewidths
Patent: 4,963,501 →
Application: 07/412,253 →
Spent Solvent Recovery in Circuit Processing
Patent: 5,017,199 →
Application: 07/415,827 →
High Speed Polarization Switch Array for Selecting a Particular Orthogonal Polarization
Patent: 5,055,805 →
Application: 07/416,192 →
Programmable Windowing Fft Device with Reduced Memory Requirements
Patent: 4,970,674 →
Application: 07/418,812 →
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Method of Forming Detector Array Contact Bumps for Improved Lift Off of Excess Metal
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Diffusion Barrier for Thin Film Hybrid Circuits
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Method of Profiling Compensator Concentration in Semiconductors
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Single Event Upset Hardening Circuits, Devices and Methods
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Charge Domain Successive Approximation Analog to Digital Converter
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Image Enhancement Techniques Using Selective Amplification of Spatial Frequency Components
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Stress-Free Chemo-Mechanical Polishing Agent for Ii-Vi Compound Semiconductor Single Crystals and Method of Polishing
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Hermetic Organic/Inorganic Interconnection Substrate for Hybrid Circuit Manufacture
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Balanced Cascode Current Mirror
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Multi-Layer Photoresist Air Bridge Fabrication Method
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Beveled Edge Impurity Band Conduction Detector
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Technique for Doping Mocvd Grown Crystalline Materials Using Free Radical Transport of the Dopant Species and Apparatus Therefor
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Cascode Amplifier Circuitry for Amplifying Differential Signals
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Battery Cell Bypass Circuit
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Stress-Free Chemo-Mechanical Polishing Agent for Ii-Vi Compound Semiconductor Single Crystals and Method of Polishing
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Digital Preprocessor Anti-Aliasing Filter System
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Self-Tapping Screw-Type Masonry Anchor
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Low Power Crystal Oscillator
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Moving Vehicle Classifier with Nonlinear Mapper
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Hbt Differential Pair Chip for Quasi-Optic Amplifiers
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Moving Vehicle Classifier with Iterative Deconvolver Estimator
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Automobile Navigation Guidance, Control and Safety System
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Method of Estimating Location and Orientation of Magnetic Dipoles Using Extended Kalman Filtering and Schweppe Likelihood Ratio Detec- Tion
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Method and Apparatus for Reducing Power Consumption in Cellular Telephone by Adaptively Determining the Reliability of the Reception of a Received Message Block
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Method and Apparatus for Traveling Wave Attenuation Measurement
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Signal Processor Contexts with Elemental and Reserved Group Addressing
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Large Time-Bandwidth Chirp Pulse Generator
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Complex Digital Demodulator Employing Chebychev-Approximation Derived Synthetic Sinusoid Generation
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Frequency Reference Compensation
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Tracking Filter and Quadrature-Phase Reference Generator
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Methods and Apparatus for Detecting Cellular Digital Packet Data (Cdpd)
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Gain and Off Set Control for Charge Based Signals
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Open Loop Phase Estimation Methods and Apparatus for Coherent Combining of Signals Using Spatially Diverse Antennas in Mobile Channels
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Open-Loop Phase Estimation Methods and Apparatus for Coherent Demodulation of Phase Modulated Carriers in Mobile Channels
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High Speed Receiver/Transmitter Interface
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Cellular Digital Packet Data Mobile Data Base Station
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Symmetrical Clock Crystal Oscillator Circuit
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Package, Socket, and Connector for Integrated Circuit
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Supply Sensing Power-on Reset Circuit
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Component Insensitive, Analog Bandpass Filter
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Use of at Commands to Test Modem with HP3065
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Accurate Reference Generation Technique Valid During System Power-Up Transients
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Efficient, Well Regulated, Dc-Dc Power Supply Up-Converter for Cmos Integrated Circuits
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Supply-Discriminating Supply-Adaptive Electronic System
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Etch Control Seal for Dissolved Wafer Micromachining Process
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Vehicular Traffic Monitoring System
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Transferable Solder Bumps for Interconnect and Assembly of Mcm Substrates
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Direct Connect Radio and Antenna Assembly
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Position Estimation Using Satellite Range Rate Measurements
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Tuner with Quadrature Downconverter for Pulse Amplitude Modulated Data Applications
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Reduced Quantization Noise from Single-Precision Multiplier
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Adaptive Timing Recovery with Gain Adjustment
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Register File with Multi-Tasking Support
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Bi-Directional Spatial Power Combiner Grid Amplifier
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Variable Multi-Threshold Detection for 0.3-Gmsk
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Digital-To-Analog Converter Wuth Binary Coded Inputs to Produce a Plurality of Outputs in the Form of Thermometer Code
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Method to Synchronize Video Modulation Using a Constant Time Base
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Unified Trellis Encoder
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Current Cell for Converting a Binary Value to an Analog Value
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Frequency and Phase-Locked Two-Phase Digital Synthesizer
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Variable Speed Playback System
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Delay Line Providing an Adjustable Delay in Response to Binary Input Signals
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Directional Steering and Navigation Indicator
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Estimator of Amplitude and Frequency of a Noisy-Biased Sinusoid from Short Bursts of Samples
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Differential Gps for Fleet Base Stations with Vector Processing Mechanization
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Etch Control Seal for Dissolved Wafer Process
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Micromachined Relay and Method of Forming the Relay
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Timing Recovery Scheme for Packet Speech in Multiplexing Environment of Voice with Data Applications
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Micromachined Relay and Method of Forming the Relay
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Pitch Lag Estimation Using Frequency -Domain Lowpass Filtering of the Linear Predictive Coding Residual
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Base-N Resolution Converter
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Cellular Digital Packet Data Mobile Data Base Station
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Disk Cartridge Having Head Loading/Unloading Ramps
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Phase Estimation and Synchronization Using a Psk Demodulator
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Method and Apparatus for Signal Classification Using I/Q Quadrant Histogram
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Bipolar Analog Multipliers for Low Voltage Applications
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Iterative Filtering Frequency Estimator and Estimation Method
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Receiver with Filters Offset Correction
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On-Chip Debug Port
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Loop Gain Processing System for Speakerphone Applications
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Efficient Speakerphone Anti-Howling System
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Spike Code-Excited Linear Prediction
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Offset Cancellation for Differential Amplifiers
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Single-Ended to Differential Converter with Relaxed Common-Mode Input Requirements
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Data Access Arrangement with Telephone Interface
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Delayed Decision Switched Prediction Multi-Stage Lsf Vector Quantization
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Adaptive Frequency Correction Burst Detector for Gsm Handset System
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Cellular Communication System with Multiple Code Rates
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Digital Modulator and Upconverter Having Single-Bit Delta-Sigma Data Converters
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Triple Register Risc Digital Signal Processor
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Method of Making Suspended Microstructures
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Baseband Demodulator for Polar or Rectangular Modulated Signal in a Cordless Spread Spectrum Telephone
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Extended Time Tracking and Peak Energy in-Window Demodulation for Use in a Direct Sequence Spread Spectrum System
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Selection of Communication Channel in a Digital Cordless Telephone
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Matched Filters for Processing Related Signal Components
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Multiple Antenna Home Base for Digital Cordless Telephones
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Multiple Antenna Home Base for Digital Cordless Telephones
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Usage of Voice Activity Detection for Efficient Coding of Speech
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Five Volt Tolerant Protection Circuit
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Space Vector Data Path
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Method and Apparatus for Coupling Multiple Independent on-Chip Vdd Busses to an Esd Core Clamp
Patent: 5,654,862 →
Application: 08/732,752 →
Cord with High Non-Structural Elongation
Patent: 5,843,583 →
Application: 08/783,076 →
Internal Testability System for Microprocessor-Based Integrated Circuit
Patent: 5,790,561 →
Application: 08/785,068 →
Data Compression for Animated Three Dimensional Objects
Patent: 5,818,463 →
Application: 08/799,818 →
Data Compression System and Method
Patent: 5,781,128 →
Application: 08/801,890 →
Synthesizer System Utilizing Mass Storage Devices for Real Time, Low Latency Access of Musical Instrument Digital Samples
Patent: 5,811,706 →
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Related Assignments (4)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignors Interest. Aug 8, 1980
From: SOCLOF SIDNEY I.
To: ROCKWELL INTERNATIONAL CORPORATION
Reel/Frame 003789/0831 →
Assignment of Assignors Interest. Aug 18, 1980
From: AUGUST RUDOLF R.; ANDERSON DEAN B.; YAO SHI-KAY
To: ROCKWELL INTERNATIONAL CORPORATION
Reel/Frame 003791/0686 →
Assignment of Assignor's Interest Sep 6, 2003
From: CONEXANT SYSTEMS, INC.
To: MINDSPEED TECHNOLOGIES
Reel/Frame 014468/0137 →
Security Agreement Oct 8, 2003
From: MINDSPEED TECHNOLOGIES, INC.
To: CONEXANT SYSTEMS, INC.
Reel/Frame 014546/0305 →