Patent Assignment
Reel/Frame 038381/0753
Change of Name
Recorded: 2016-04-07
Pages: 8
Assignor
PMC-SIERRA, INC.
Executed: 2016-01-15
Assignee
MICROSEMI STORAGE SOLUTIONS, INC.
ONE ENTERPRISE, ALISO VIEJO, CALIFORNIA, 92656
Covered Properties
(117)
Digital Control of a Linc Linear Power Amplifier
Patent:
6,054,894 →
Application:
09/100,568 →
Controller and Associated Methods for a Linc Linear Power Amplifier
Patent:
6,054,896 →
Application:
09/216,067 →
Compensation System and Methods for a Linear Power Amplifier
Patent:
5,990,738 →
Application:
09/216,091 →
System and Methods for Stimulating and Training a Linc Power Amplifier During Non-Transmission Events
Patent:
5,990,734 →
Application:
09/216,092 →
Use of Antiphase Signals for Predistortion Training Within an Amplifier System
Patent:
6,313,703 →
Application:
09/517,702 →
Digital Predistortion Methods for Wideband Amplifiers
Patent:
6,587,514 →
Application:
09/595,988 →
Wideband Digital Predistortion Linearizer for Nonlinear Amplifiers
Patent:
6,798,843 →
Application:
09/596,142 →
Transmission Antenna Array System with Predistortion
Patent:
6,697,436 →
Application:
09/596,410 →
Amplifier measurement and modeling processes for use in generating predistortion parameters
Patent:
6,356,146 →
Application:
09/596,962 →
Predistortion amplifier system with separately controllable amplifiers
Patent:
6,342,810 →
Application:
09/597,915 →
Advanced Adaptive Pre-Distortion in a Radio Frequency Transmitter
Patent:
6,973,138 →
Application:
09/764,680 →
Low Noise Wideband Digital Predistortion Amplifier
Wideband Analog Quadrature Modulator/Demodulator with Pre-Compensation/Post-Compensation Correction
Patent:
6,940,916 →
Application:
09/771,144 →
Amplifier Measurement and Modeling Processes for Use in Generating Predistortion Parameters
Amplifier Measurement and Modeling Processes for Use in Generating Predistortion Parameters
Amplifier Measurement and Modeling Processes for Use in Generating Predistortion Parameters
Systems and Methods for the Dynamic Range Compression of Multi-Bearer Single-Carrier and Multi-Carrier Waveforms
Systems and Methods for the Reduction of Peak to Average Signal Levels of Multi-Bearer Single-Carrier and Multi-Carrier Waveforms
Constant Gain Digital Predistortion Controller for Linearization of Non-Linear Amplifiers
Patent:
7,058,369 →
Application:
10/302,782 →
Flexible Adaptation Engine for Adaptive Transversal Filters
Cache Memory Architecture and Associated Microprocessor Design
In-Phase and Quadrature Decision Feedback Equalizer
Patent:
7,339,989 →
Application:
10/818,189 →
Systems and Methods for Actively-Peaked Current-Mode Logic
Patent:
7,202,706 →
Application:
10/820,381 →
Systems and Methods for Jitter Analysis of Digital Signals
Patent:
7,388,937 →
Application:
10/923,988 →
Built in Self Test (Bist) for High-Speed Serial Transceivers
Patent:
7,756,197 →
Application:
10/998,090 →
Systems and Methods for a Built in Test Circuit for Asynchronous Testing of High-Speed Transceivers
Patent:
7,363,563 →
Application:
11/005,465 →
Decision Feedback Equalizer (Dfe) for Jitter Reduction
Patent:
7,242,712 →
Application:
11/074,966 →
Systems and Methods for Signature Circuits
Patent:
7,437,641 →
Application:
11/096,293 →
Quadrature Modulation Compensation
Patent:
7,515,650 →
Application:
11/099,098 →
Active Biasing in Metal Oxide Semiconductor (Mos) Differential Pairs
Patent:
7,471,107 →
Application:
11/128,953 →
Pre-Cursor Inter-Symbol Interference Cancellation
Patent:
7,177,352 →
Application:
11/146,375 →
Systems and Methods for Translation of Signal Levels Across Voltage Domains
Patent:
7,205,820 →
Application:
11/177,853 →
Systems and Methods for a Self-Organizing Analog-to-Digital Converter
Patent:
7,161,523 →
Application:
11/219,417 →
Advanced Adaptive Pre-Distortion in a Radio Frequency Transmitter
Patent:
7,471,739 →
Application:
11/231,165 →
Clock and Data Recovery Locking Technique for Large Frequency Offsets
Patent:
7,738,617 →
Application:
11/237,622 →
Systems and Methods for Reducing Frequency-Offset Induced Jitter
Patent:
7,558,357 →
Application:
11/257,711 →
Constant Gain Digital Predistortion Controller for Linearization of Non-Linear Amplifiers
Patent:
7,260,365 →
Application:
11/392,180 →
Constant Gain Digital Predistortion Controller for Linearization of Non-Linear Amplifiers
Patent:
7,200,367 →
Application:
11/392,286 →
Constant Gain Digital Predistortion Controller for Linearization of Non-Linear Amplifiers
Patent:
7,177,603 →
Application:
11/392,439 →
Constant Gain Digital Predistortion Controller for Linearization of Non-Linear Amplifiers
Patent:
7,340,223 →
Application:
11/392,453 →
Constant Gain Digital Predistortion Controller for Linearization of Non-Linear Amplifiers
Patent:
7,295,815 →
Application:
11/392,460 →
Systems and Methods for the Dynamic Range Compression of Multi-Bearer Single-Carrier and Multi-Carrier Waveforms
Systems and Methods for the Reduction of Peak to Average Signal Levels of Multi-Bearer Single-Carrier and Multi-Carrier Waveforms
Cache Memory Architecture with System Controller Device That Compares Cache Tags to Memory Addresses Received from Microprocessor
Compact Cmos Esd Layout Techniques with Either Fully Segmented Salicide Ballasting (Fssb) in the Source and/or Drain Regions
Patent:
7,646,063 →
Application:
11/451,610 →
Systems and Methods for Speed Binning of Integrated Circuts
Patent:
7,539,893 →
Application:
11/513,624 →
Stabilized Digital Timing Recovery Using Low-Complexity Equalizer
Patent:
7,656,945 →
Application:
11/538,346 →
Systems and Methods for Esd Protection
Patent:
7,719,806 →
Application:
11/672,304 →
Constant Gain Digital Predistortion Controller for Linearization of Non-Linear Amplifiers
Patent:
7,904,033 →
Application:
11/678,863 →
Systems and Methods of Reducing Power Consumption of Digital Integrated Circuits
Patent:
7,557,626 →
Application:
11/681,057 →
Post-Distortion Filter for Reducing Sensitivity to Receiver Nonlinearities
Patent:
7,912,151 →
Application:
11/688,685 →
Systems and Methods for Actively-Peaked Current-Mode Logic
Patent:
7,288,971 →
Application:
11/691,859 →
Forward Error Correction with Self-Synchronous Scramblers
Patent:
7,913,151 →
Application:
11/753,409 →
Adaptive Signal Decompression
Patent:
7,936,835 →
Application:
11/777,819 →
Systems and Methods for Hitless Equipment Protection
Patent:
7,656,791 →
Application:
11/780,361 →
Out-Of-Channel Received Signal Strength Indication (Rssi) for Rf Front End
Patent:
7,979,041 →
Application:
11/952,463 →
Pattern-Based Dc Offset Correction
Patent:
7,622,987 →
Application:
12/019,535 →
Techniques to Control Amplifier Gain Over Process, Voltage, and/or Temperature (Pvt) Variations
Patent:
7,656,227 →
Application:
12/037,340 →
Clock and Data Recovery Sampler Calibration
Patent:
8,249,207 →
Application:
12/040,585 →
Tuning of Analog Filters
Patent:
7,714,643 →
Application:
12/044,636 →
Run-Length Based Spectral Analysis
Patent:
8,019,028 →
Application:
12/055,948 →
Interference Erasure Using Soft Decision Weighting of the Viterbi Decoder Input in Ofdm Systems
Patent:
8,019,029 →
Application:
12/062,392 →
Adaptive Predistortion of Non-Linear Amplifiers with Burst Data
Patent:
8,023,588 →
Application:
12/099,369 →
Phase pre-emphasis for a serial data transmitter
Patent:
8,315,303 →
Application:
12/110,210 →
Power Optimized Adc for Wireless Transceivers
Patent:
7,760,122 →
Application:
12/114,322 →
Wideband Mixer
Patent:
8,396,441 →
Application:
12/170,176 →
Active Biasing in Metal Oxide Semiconductor (Mos) Differential Pairs
Patent:
7,969,195 →
Application:
12/265,609 →
Integrated Tunable Rf Notch Filter
Patent:
8,428,203 →
Application:
12/349,328 →
Equalizer for Heavily Clipped or Compressed Communications Signals
Patent:
8,428,113 →
Application:
12/359,046 →
Method and Apparatus for Serdes Jitter Tolerance Improvement
Patent:
8,116,409 →
Application:
12/361,436 →
Hot-Pluggable Differential Signaling Driver
Patent:
7,898,295 →
Application:
12/407,269 →
High Speed Phase Frequency Detector
Patent:
7,940,088 →
Application:
12/415,426 →
Transceiver Gain Calibration
Patent:
8,134,410 →
Application:
12/488,919 →
Echo Cancellation for Duplex Radios
Patent:
7,916,671 →
Application:
12/504,295 →
Methods for Forming Fully Segmented Salicide Ballasting (Fssb) in the Source and/or Drain Region
Patent:
7,985,644 →
Application:
12/606,691 →
Jitter Attenuation with a Fractional-N Clock Synthesizer
Patent:
7,986,190 →
Application:
12/610,074 →
Reduction of Electromagnetic Interference for Differential Signals
Patent:
8,004,330 →
Application:
12/627,345 →
Equalizer Adaptation for Heavily Compressed or Clipped Communications Signals
Patent:
8,644,369 →
Application:
12/628,894 →
Systems and Methods for Signature Circuits
Patent:
8,639,995 →
Application:
12/704,406 →
Predistortion with Integral Crest-Factor Reduction and Reduced Observation Bandwidth
Patent:
8,446,979 →
Application:
12/715,745 →
Power Optimized Adc for Wireless Transceivers
Patent:
7,982,651 →
Application:
12/748,754 →
Method and Apparatus for Improving the Signal Integrity of High-Speed Serial Data Receivers Using Coupled Inductors
Patent:
8,947,840 →
Application:
12/781,335 →
Input/Output Interfacing with Low Power
Patent:
8,018,251 →
Application:
12/791,547 →
Clock and Data Recovery Locking Technique for Large Frequency Offsets
Patent:
8,139,702 →
Application:
12/815,045 →
Reduction of Correlated Channel Impairments
Patent:
8,611,473 →
Application:
12/969,402 →
Post-Distortion Filter for Reducing Sensitivity to Receiver Nonlinearities
Patent:
8,300,733 →
Application:
12/985,206 →
Forward Error Correction with Self-Synchronous Scramblers
Patent:
8,020,077 →
Application:
13/019,734 →
Adaptive Signal Decompression
Patent:
8,396,149 →
Application:
13/079,310 →
Active Biasing in Metal Oxide Semiconductor (Mos) Differential Pairs
Patent:
8,669,782 →
Application:
13/156,720 →
Apparatus and Method for Driving a Transistor
Patent:
8,624,641 →
Application:
13/288,866 →
Scalable High-Swing Transmitter with Rise and/or Fall Time Mismatch Compensation
Patent:
8,446,173 →
Application:
13/288,875 →
Apparatus and Method for Generating a Bias Voltage
Patent:
8,547,140 →
Application:
13/288,881 →
Systems and Methods for Storing Data in Page Stripes of a Flash Drive
Patent:
9,176,812 →
Application:
13/477,568 →
Systems and Methods for Low Latency, High Reliability Error Correction in a Flash Drive
Patent:
8,788,910 →
Application:
13/477,595 →
Systems and Methods for Redundantly Storing Error Correction Codes in a Flash Drive with Secondary Parity Information Spread Out Across Each Page of a Group of Pages
Patent:
9,021,336 →
Application:
13/477,598 →
Systems and Methods for Transparently Varying Error Correction Code Strength in a Flash Drive
Patent:
8,972,824 →
Application:
13/477,599 →
Systems and Methods for Adaptively Selecting from Among a Plurality of Error Correction Coding Schemes in a Flash Drive for Robustness and Low Latency
Patent:
9,183,085 →
Application:
13/477,600 →
Systems and Methods for Recovering Data from Failed Portions of a Flash Drive
Patent:
9,021,333 →
Application:
13/477,601 →
Systems and Methods for Adaptively Selecting Among Different Error Correction Coding Schemes in a Flash Drive
Patent:
9,021,337 →
Application:
13/477,629 →
Systems and Methods for Initializing Regions of a Flash Drive Having Diverse Error Correction Coding (Ecc) Schemes
Patent:
8,996,957 →
Application:
13/477,633 →
System and Method for Tolerating a Failed Page in a Flash Device
Patent:
9,047,214 →
Application:
13/477,635 →
Systems and Methods for Reclaiming Flash Blocks of a Flash Drive
Patent:
8,793,556 →
Application:
13/477,845 →
Gain Calibration for a Mueller-Muller type Timing Error Detector
Patent:
8,693,596 →
Application:
13/549,030 →
Parallel Replica Cdr to Correct Offset and Gain in a Baud Rate Sampling Phase Detector
Patent:
8,942,334 →
Application:
13/549,134 →
Post-Distortion Filter for Reducing Sensitivity to Receiver Nonlinearities
Patent:
8,582,701 →
Application:
13/662,282 →
Adaptive Signal Decompression
Patent:
8,687,723 →
Application:
13/740,113 →
Systems and Methods for Mapping for Solid-State Memory
Patent:
9,009,565 →
Application:
13/844,448 →
Systems and Methods for Storing Data for Solid-State Memory
Patent:
9,053,012 →
Application:
13/844,463 →
Systems and Methods for Decoding Data for Solid-State Memory
Patent:
9,081,701 →
Application:
13/844,474 →
Systems and Methods for Reclaiming Memory for Solid-State Memory
Patent:
9,208,018 →
Application:
13/844,486 →
Systems and Methods for Adapting to Changing Characteristics of Multi-Level Cells in Solid-State Memory
Patent:
9,026,867 →
Application:
13/844,499 →
Equalizer for Heavily Clipped or Compressed Communications Signals
Patent:
8,995,518 →
Application:
13/867,886 →
Scalable High-Swing Transmitter with Rise and/or Fall Time Mismatch Compensation
Patent:
9,148,146 →
Application:
13/898,310 →
Post-Distortion Filter for Reducing Sensitivity to Receiver Nonlinearities
Patent:
9,008,228 →
Application:
14/076,929 →
Apparatus and Method for Driving a Transistor
Patent:
8,988,118 →
Application:
14/148,448 →
Active Biasing in Metal Oxide Semiconductor (Mos) Differential Pairs
Patent:
9,325,305 →
Application:
14/203,011 →
Gain Calibration for a Timing Error Detector
Patent:
9,071,320 →
Application:
14/247,103 →
Related Assignments
(19)
Other recorded transfers of the patents in this record — the chain of ownership.
Security Interest in Patents
Aug 6, 2013
From: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 030947/0710 →
Release of Security Interest
Feb 1, 2016
From: BANK OF AMERICA, N.A.
To: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
Reel/Frame 037675/0129 →
Patent Security Agreement
Feb 3, 2016
From: MICROSEMI STORAGE SOLUTIONS, INC. (F/K/A PMC-SIERRA, INC.); MICROSEMI STORAGE SOLUTIONS (U.S.), INC. (F/K/A PMC-SIERRA US, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037689/0719 →
Partial Release of Security Interest in Patents
Apr 28, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI STORAGE SOLUTIONS (U.S.), INC. (FORMERLY KNOW AS PMC-SIERRA US, INC.); MICROSEMI STORAGE SOLUTIONS, INC. (FORMERLY KNOW AS PMC-SIERRA, INC.)
Reel/Frame 038557/0236 →
Assignment of Assignor's Interest
Jul 26, 2016
From: MICROSEMI STORAGE SOLUTIONS, INC.
To: MAXLINEAR ASIA SINGAPORE PTE LTD.
Reel/Frame 039463/0743 →
Assignment of Assignor's Interest
Oct 18, 2016
From: MICROSEMI STORAGE SOLUTIONS, INC.
To: MAXLINEAR ASIA SINGAPORE PTE LTD.
Reel/Frame 040046/0146 →
Release of Security Interest
May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.; MICROSEMI STORAGE SOLUTIONS (U.S.), INC.
Reel/Frame 046251/0271 →
Security Interest
Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
Security Interest
Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
Security Interest
Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
Release of Security Interest
May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 053466/0011 →
Security Interest
Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
Security Interest
Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
Security Interest
Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
Release of Security Interest
Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059333/0222 →
Release of Security Interest
Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059358/0001 →
Release of Security Interest
Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059863/0400 →
Release of Security Interest
Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059363/0001 →
Release of Security Interest
Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 060894/0437 →