IP Library Assignment 054341/0057
Patent Assignment
Reel/Frame 054341/0057

Release of Security Interest

Recorded: 2020-11-06 Pages: 75
Assignor
CPPIB CREDIT INVESTMENTS INC.
Executed: 2020-10-28
Assignee
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
515 LEGGET DRIVE, SUITE 704, OTTAWA, K2K 3G4, CANADA
Covered Properties (67)
Power Supplies in Flash Memory Devices and Systems
Patent: 7,839,689 →
Application: 12/115,784 →
Publication: US 2009/0278591
Nand Flash Memory Having Multiple Cell Substrates
Patent: 7,940,572 →
Application: 12/143,285 →
Publication: US 2009/0175081
Mulitple-Bit Per Cell (Mbc) Non-Volatile Memory Apparatus and System Having Polarity Control and Method of Programming Same
Patent: 7,729,166 →
Application: 12/166,876 →
Publication: US 2010/0002504
Data Storage and Stackable Configurations
Patent: 8,399,973 →
Application: 12/168,354 →
Publication: US 2009/0161402
Non-Volatile Semiconductor Memory Device with Power Saving Feature
Patent: 8,145,925 →
Application: 12/210,580 →
Publication: US 2009/0164830
Cache Filtering Method and Apparatus
Patent: 8,627,009 →
Application: 12/211,159 →
Publication: US 2010/0070709
Dual Function Compatible Non-Volatile Memory Device
Patent: 7,983,099 →
Application: 12/258,056 →
Publication: US 2009/0161451
Non-Volatile Memory Device Having Configurable Page Size
Patent: 8,068,365 →
Application: 12/329,929 →
Publication: US 2009/0196103
Flexible Memory Operations in Nand Flash Devices
Patent: 8,120,990 →
Application: 12/364,665 →
Publication: US 2009/0196102
Composite Memory Having a Bridging Device for Connecting Discrete Memory Devices to a System
Patent: 7,957,173 →
Application: 12/401,963 →
Publication: US 2010/0091536
Stacked Semiconductor Devices Including a Master Device
Patent: 7,894,230 →
Application: 12/429,310 →
Publication: US 2010/0214812
Non-Volatile Semiconductor Memory Device with Power Saving Feature
Patent: 8,291,248 →
Application: 12/488,278 →
Publication: US 2009/0259873
Nand Flash Architecture with Multi-Level Row Decoding
Patent: 8,189,390 →
Application: 12/495,089 →
Publication: US 2010/0226179
Bridging Device Having a Configurable Virtual Page Size
Patent: 8,549,209 →
Application: 12/508,926 →
Publication: US 2010/0115214
Bridge Device Architecture for Connecting Discrete Memory Devices to a System
Patent: 8,134,852 →
Application: 12/533,732 →
Publication: US 2010/0091538
Bridge Device Having a Virtual Page Buffer
Application: 12/607,680 →
Publication: US 2010/0115172
Using Interrupted Through-Silicon-Vias in Integrated Circuits Adapted for Stacking
Patent: 8,400,781 →
Application: 12/757,540 →
Publication: US 2011/0050320
Reconfiguring Through Silicon Vias in Stacked Multi-Die Packages
Patent: 8,604,593 →
Application: 12/773,340 →
Publication: US 2011/0090004
System and Method Providing Interoperability Between Cellular and Other Wireless Systems
Patent: 8,620,270 →
Application: 12/816,130 →
Publication: US 2011/0081890
Method of Configuring Non-Volatile Memory for a Hybrid Disk Drive
Patent: 8,296,521 →
Application: 12/827,718 →
Publication: US 2010/0268874
Power Supplies in Flash Memory Devices and Systems
Patent: 8,064,260 →
Application: 12/903,271 →
Publication: US 2011/0032773
Semiconductor Memory Device with Plural Memory Die and Controller Die
Patent: 8,966,208 →
Application: 12/967,918 →
Publication: US 2011/0208906
Stacked Semiconductor Devices Including a Master Device
Patent: 8,339,826 →
Application: 13/005,774 →
Publication: US 2011/0110155
Composite Semiconductor Memory Device with Error Correction
Patent: 9,098,430 →
Application: 13/038,461 →
Publication: US 2011/0231739
Semiconductor Memory Device with Sense Amplifier and Bitline Isolation
Patent: 8,462,573 →
Application: 13/040,324 →
Publication: US 2011/0305098
Multi-Chip Package with Offset Die Stacking
Patent: 8,502,368 →
Application: 13/042,571 →
Publication: US 2012/0056335
Nand Flash Memory Having Multiple Cell Substrates
Patent: 8,582,372 →
Application: 13/073,150 →
Publication: US 2011/0170352
Multi-Chip Package with Thermal Frame and Method of Assembling
Patent: 8,587,111 →
Application: 13/090,427 →
Publication: US 2012/0001314
Bridge Device Architecture for Connecting Discrete Memory Devices to a System
Patent: 8,737,105 →
Application: 13/091,465 →
Publication: US 2011/0194365
Semiconductor Device with Configurable Through-Silicon Vias
Patent: 8,866,303 →
Application: 13/094,613 →
Publication: US 2011/0309518
Semiconductor Device with Through-Silicon Vias
Patent: 9,030,024 →
Application: 13/094,619 →
Publication: US 2011/0309519
Phase Change Memory Word Line Driver
Patent: 8,526,227 →
Application: 13/110,399 →
Publication: US 2011/0317482
Dual Function Compatible Non-Volatile Memory Device
Patent: 8,270,244 →
Application: 13/159,060 →
Publication: US 2011/0242906
Power Supplies in Flash Memory Devices and Systems
Patent: 8,351,265 →
Application: 13/249,744 →
Publication: US 2012/0020168
Non-Volatile Memory Device Having Configurable Page Size
Patent: 8,379,450 →
Application: 13/276,856 →
Publication: US 2012/0033497
Flexible Memory Operations in Nand Flash Devices
Patent: 8,619,493 →
Application: 13/348,107 →
Publication: US 2012/0113721
Bridge Device Architecture for Connecting Discrete Memory Devices to a System
Patent: 8,363,444 →
Application: 13/365,895 →
Publication: US 2012/0134194
Non-Volatile Semiconductor Memory Device with Power Saving Feature
Patent: 8,359,485 →
Application: 13/408,252 →
Publication: US 2012/0159055
Nand Flash Architecture with Multi-Level Row Decoding
Patent: 8,854,884 →
Application: 13/467,491 →
Publication: US 2012/0218829
Dual Function Compatible Non-Volatile Memory Device
Patent: 8,559,261 →
Application: 13/592,953 →
Publication: US 2012/0320693
Non-Volatile Semiconductor Memory Device with Power-Saving Feature
Patent: 9,213,389 →
Application: 13/617,908 →
Publication: US 2013/0010563
Method of Configuring Non-Volatile Memory for a Hybrid Disk Drive
Patent: 8,677,084 →
Application: 13/655,582 →
Publication: US 2013/0046921
Stacked Semiconductor Devices Including a Master Device
Patent: 8,593,847 →
Application: 13/713,320 →
Publication: US 2013/0102111
Non-Volatile Memory Device Having Configurable Page Size
Patent: 8,675,408 →
Application: 13/743,899 →
Publication: US 2013/0128668
Data Storage and Stackable Chip Configurations
Patent: 9,183,892 →
Application: 13/765,059 →
Publication: US 2013/0182485
Multiple-Bit Per Cell (Mbc) Non-Volatile Memory Apparatus and System Having Polarity Control and Method of Programming Same
Patent: 8,724,384 →
Application: 13/777,485 →
Publication: US 2013/0170294
Using Interrupted Through-Silicon-Vias in Integrated Circuits Adapted for Stacking
Patent: 8,711,573 →
Application: 13/777,645 →
Publication: US 2013/0169343
Phase-Change Memory with Multiple Polarity Bits Having Enhanced Endurance and Error Tolerance
Patent: 8,780,622 →
Application: 13/860,724 →
Publication: US 2013/0215677
Semiconductor Memory Device with Sense Amplifier and Bitline Isolation
Patent: 8,780,664 →
Application: 13/912,650 →
Publication: US 2013/0265839
Multi-Chip Package with Offset Die Stacking and Method of Making Same
Patent: 9,177,863 →
Application: 13/951,132 →
Publication: US 2013/0309810
Phase Change Memory Word Line Driver
Patent: 8,879,311 →
Application: 13/973,600 →
Publication: US 2013/0336055
Dual Function Compatible Non-Volatile Memory Device
Patent: 8,837,237 →
Application: 14/026,359 →
Publication: US 2014/0010022
Bridging Device Having a Configurable Virtual Page Size
Patent: 9,977,731 →
Application: 14/027,858 →
Publication: US 2014/0019705
Nand Flash Memory Having Multiple Cell Substrates
Patent: 9,070,461 →
Application: 14/032,816 →
Publication: US 2014/0022846
Stacked Semiconductor Devices Including a Master Device
Patent: 8,964,440 →
Application: 14/082,454 →
Publication: US 2014/0071729
System and Method Providing Interoperability Between Cellular and Other Wireless Systems
Application: 14/097,506 →
Publication: US 2014/0092891
Reconfiguring Through Silicon Vias in Stacked Multi-Die Packages
Patent: 9,117,685 →
Application: 14/101,507 →
Publication: US 2014/0097891
Non-Volatile Memory Device Having Configurable Page Size
Patent: 9,117,527 →
Application: 14/158,116 →
Publication: US 2014/0133235
Using Interrupted Through-Silicon-Vias in Integrated Circuits Adapted for Stacking
Patent: 9,190,369 →
Application: 14/254,865 →
Publication: US 2014/0227829
Bridge Device Architecture for Connecting Discrete Memory Devices to a System
Patent: 9,159,380 →
Application: 14/268,350 →
Publication: US 2014/0241080
Semiconductor Memory Device with Plural Memory Die and Controller Die
Patent: 9,348,786 →
Application: 14/625,858 →
Publication: US 2015/0161072
Nand Flash Memory Having Multiple Cell Substrates
Patent: 9,583,204 →
Application: 14/753,500 →
Publication: US 2015/0364207
Composite Semiconductor Memory Device with Error Correction
Patent: 9,411,680 →
Application: 14/795,114 →
Publication: US 2015/0309867
Non-Volatile Memory Device Having Configurable Page Size
Patent: 9,330,765 →
Application: 14/809,831 →
Publication: US 2016/0005469
Using Interrupted Through-Silicon-Vias in Integrated Circuits Adapted for Stacking
Patent: 9,780,073 →
Application: 14/886,190 →
Publication: US 2016/0099234
Multipage Program Scheme for Flash Memory
Patent: 9,852,788 →
Application: 15/266,196 →
Publication: US 2017/0004877
Nand Flash Memory Having Multiple Cell Substrates
Patent: 9,899,096 →
Application: 15/411,138 →
Publication: US 2017/0229188
Related Assignments (13)
Other recorded transfers of the patents in this record — the chain of ownership.
U.S. Intellectual Property Security Agreement (for Non-U.S. Grantors) - Short Form Jan 10, 2012
From: 658276 N.B. LTD.; 658868 N.B. INC.; MOSAID TECHNOLOGIES INCORPORATED
To: ROYAL BANK OF CANADA
Reel/Frame 027512/0196 →
Change of Name Mar 13, 2014
From: MOSAID TECHNOLOGIES INCORPORATED
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 032439/0638 →
Release of Security Interest Aug 7, 2014
From: ROYAL BANK OF CANADA
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.; CONVERSANT IP N.B. 868 INC.; CONVERSANT IP N.B. 276 INC.
Reel/Frame 033484/0344 →
Change of Address Sep 3, 2014
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 033678/0096 →
U.S. Patent Security Agreement (for Non-U.S. Grantors) Sep 9, 2014
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS INC., AS LENDER; ROYAL BANK OF CANADA, AS LENDER
Reel/Frame 033706/0367 →
Amended and Restated U.S. Patent Security Agreement (for Non-U.S. Grantors) Aug 22, 2018
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS, INC.
Reel/Frame 046900/0136 →
Release of U.S. Patent Agreement (for Non-U.S. Grantors) Oct 12, 2018
From: ROYAL BANK OF CANADA, AS LENDER
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 047645/0424 →
Change of Name May 27, 2021
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 056409/0050 →
Change of Name Jun 16, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 056610/0258 →
Change of Name Sep 9, 2021
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 057709/0849 →
Change of Name Oct 19, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 058297/0458 →
Corrective Assignment to Correct the Conveying Party's Name Previously Recorded at Reel: 058297 Frame: 0458. Assignor(S) Hereby Confirms the Change of Name. Aug 30, 2023
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 064761/0349 →
Corrective Assignment to Correct the Conveying Party's Name Previously Recorded at Reel: 056610 Frame: 0258. Assignor(S) Hereby Confirms the Change of Name. Aug 30, 2023
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 064783/0161 →